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openwrt/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi

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ipq806x: introduce ipq8064 SoC v2 dtsi According to QCA internal numbering there are 3 versions of ipq8064/5 SoC: ipq8064 v1.0 - probably ipq8064 evaluation boards only ipq8064 v2.0 - probably ipq8064 mass market boards only ipq8064 v3.0 - aka ipq8065, boards based on ipq8065. Each next revision includes configuration differences from previous revision and adds something new. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> [slh: rebase for kernel v4.14 as well] Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
2018-01-18 09:39:50 +00:00
#include "qcom-ipq8064-v1.0.dtsi"
ipq806x: apply updated USB PHY settings to v2.0 SoC USB PHY power settings introduced for ipq8065 SoC with commit 644a0d5 "ipq8065: adjust SS USB PHY power settings" According to that commit msg and in correspondence to GPL tarballs and related QSDK branch those settings are applied to ipq8064 SoCs of version >= 2.0. https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L2507-L2514 Now as we have clarified that mass market boards are of SoC v2.0 move those USB PHY settings from ipq8065 (v3.0 SoC) dtsi to ipq8064 v2.0 dtsi. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> [slh: rebase for kernel v4.14 as well] Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
2018-01-18 10:38:18 +00:00
/ {
soc: soc {
ss_phy_0: phy@110f8830 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
};
ss_phy_1: phy@100f8830 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;
mpll = <0xa0>;
};
};
};