ipq40xx: add support for EnGenius EAP2200
SOC: IPQ4019 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB
FLASH: NOR 4 MiB + NAND 128 MiB
ETH: Qualcomm Atheros QCA8072
WLAN1: Qualcomm Atheros QCA4019 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4019 5GHz 802.11a/n/ac 2:2x2
WLAN2: Qualcomm Atheros QCA9888 5GHz 802.11a/n/ac 2:2x2
INPUT: WPS Button
LEDS: Power, LAN1, LAN2, WLAN 2.4GHz, WLAN 5GHz-1, WLAN 5GHz-2, OPMODE
1. Load Ramdisk via U-Boot
To set up the flash memory environment, do the following:
a. As a preliminary step, ensure that the board console port is connected to the PC using these RS232 parameters:
* 115200bps
* 8N1
b. Confirm that the PC is connected to the board using one of the Ethernet ports.
c. Set a static ip 192.168.99.8 for Ethernet that connects to board.
d. The PC must have a TFTP server launched and listening on the interface to which the board is connected.
e. At this stage power up the board and, after a few seconds, press 4 and then any key during the countdown.
U-BOOT> set serverip 192.168.99.9 && tftpboot 0x84000000 192.168.99.8:openwrt.itb && bootm
Signed-off-by: Steven Lin <steven.lin@senao.com>
[copied 4.19 dts to 5.4]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2019-09-02 02:39:45 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
|
|
|
|
#include "qcom-ipq4019.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "EnGenius EAP2200";
|
|
|
|
compatible = "engenius,eap2200";
|
|
|
|
|
|
|
|
aliases {
|
|
|
|
led-boot = &led_power;
|
|
|
|
led-failsafe = &led_power;
|
|
|
|
led-running = &led_power;
|
|
|
|
led-upgrade = &led_power;
|
|
|
|
};
|
|
|
|
|
2020-03-05 11:21:40 +00:00
|
|
|
keys {
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
wps {
|
|
|
|
label = "wps";
|
|
|
|
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
ipq40xx: add support for EnGenius EAP2200
SOC: IPQ4019 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB
FLASH: NOR 4 MiB + NAND 128 MiB
ETH: Qualcomm Atheros QCA8072
WLAN1: Qualcomm Atheros QCA4019 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4019 5GHz 802.11a/n/ac 2:2x2
WLAN2: Qualcomm Atheros QCA9888 5GHz 802.11a/n/ac 2:2x2
INPUT: WPS Button
LEDS: Power, LAN1, LAN2, WLAN 2.4GHz, WLAN 5GHz-1, WLAN 5GHz-2, OPMODE
1. Load Ramdisk via U-Boot
To set up the flash memory environment, do the following:
a. As a preliminary step, ensure that the board console port is connected to the PC using these RS232 parameters:
* 115200bps
* 8N1
b. Confirm that the PC is connected to the board using one of the Ethernet ports.
c. Set a static ip 192.168.99.8 for Ethernet that connects to board.
d. The PC must have a TFTP server launched and listening on the interface to which the board is connected.
e. At this stage power up the board and, after a few seconds, press 4 and then any key during the countdown.
U-BOOT> set serverip 192.168.99.9 && tftpboot 0x84000000 192.168.99.8:openwrt.itb && bootm
Signed-off-by: Steven Lin <steven.lin@senao.com>
[copied 4.19 dts to 5.4]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2019-09-02 02:39:45 +00:00
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
|
|
|
led_power: power {
|
|
|
|
label = "eap2200:amber:power";
|
|
|
|
gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
lan1 {
|
|
|
|
label = "eap2200:blue:lan1";
|
|
|
|
gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
lan2 {
|
|
|
|
label = "eap2200:blue:lan2";
|
|
|
|
gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan2g {
|
|
|
|
label = "eap2200:blue:wlan2g";
|
|
|
|
gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,default-trigger = "phy0tpt";
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan5g {
|
|
|
|
label = "eap2200:yellow:wlan5g";
|
|
|
|
gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,default-trigger = "phy1tpt";
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan5g2 {
|
|
|
|
label = "eap2200:yellow:wlan5g2";
|
|
|
|
gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
|
|
|
|
linux,default-trigger = "phy2tpt";
|
|
|
|
};
|
|
|
|
|
|
|
|
mode {
|
|
|
|
label = "eap2200:blue:mode";
|
|
|
|
gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
soc {
|
|
|
|
rng@22000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
mdio@90000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
ess-psgmii@98000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
crypto@8e3a000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
watchdog@b017000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
ess-switch@c000000 {
|
|
|
|
status = "okay";
|
|
|
|
switch_lan_bmp = <0x10>;
|
|
|
|
};
|
|
|
|
|
|
|
|
edma@c080000 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&blsp_dma {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&blsp1_spi1 {
|
|
|
|
pinctrl-0 = <&spi_0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
flash@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
compatible = "jedec,spi-nor";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <24000000>;
|
|
|
|
partitions {
|
|
|
|
compatible = "fixed-partitions";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
partition0@0 {
|
|
|
|
label = "0:SBL1";
|
|
|
|
reg = <0x00000000 0x00040000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition1@40000 {
|
|
|
|
label = "0:MIBIB";
|
|
|
|
reg = <0x00040000 0x00020000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition2@60000 {
|
|
|
|
label = "0:QSEE";
|
|
|
|
reg = <0x00060000 0x00060000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition3@c0000 {
|
|
|
|
label = "0:CDT";
|
|
|
|
reg = <0x000c0000 0x00010000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition4@d0000 {
|
|
|
|
label = "0:DDRPARAMS";
|
|
|
|
reg = <0x000d0000 0x00010000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition5@e0000 {
|
|
|
|
label = "0:APPSBLENV";
|
|
|
|
reg = <0x000e0000 0x00010000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition6@f0000 {
|
|
|
|
label = "0:APPSBL";
|
|
|
|
reg = <0x000f0000 0x00080000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition7@170000 {
|
|
|
|
label = "0:ART";
|
|
|
|
reg = <0x00170000 0x00010000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&blsp1_uart1 {
|
|
|
|
pinctrl-0 = <&serial_0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&cryptobam {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&gmac0 {
|
|
|
|
vlan_tag = <1 0x10>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&nand {
|
|
|
|
pinctrl-0 = <&nand_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
nand@0 {
|
|
|
|
partitions {
|
|
|
|
compatible = "fixed-partitions";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
partition@0 {
|
|
|
|
label = "rootfs1";
|
|
|
|
reg = <0x00000000 0x04000000>;
|
|
|
|
};
|
|
|
|
partition@40000000 {
|
|
|
|
label = "ubi";
|
|
|
|
reg = <0x04000000 0x04000000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie0 {
|
|
|
|
status = "okay";
|
|
|
|
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
|
|
|
|
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
|
|
|
|
|
|
|
|
bridge@0,0 {
|
|
|
|
reg = <0x00000000 0 0 0 0>;
|
|
|
|
#address-cells = <3>;
|
|
|
|
#size-cells = <2>;
|
|
|
|
ranges;
|
|
|
|
|
|
|
|
wifi2: wifi@1,0 {
|
|
|
|
compatible = "qcom,ath10k";
|
|
|
|
reg = <0x00010000 0 0 0 0>;
|
|
|
|
ieee80211-freq-limit = <5470000 5875000>;
|
|
|
|
qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&qpic_bam {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&tlmm {
|
|
|
|
nand_pins: nand_pins {
|
|
|
|
pullups {
|
|
|
|
pins = "gpio53", "gpio58", "gpio59";
|
|
|
|
function = "qpic";
|
|
|
|
bias-pull-up;
|
|
|
|
};
|
|
|
|
|
|
|
|
pulldowns {
|
|
|
|
pins = "gpio54", "gpio55", "gpio56",
|
|
|
|
"gpio57", "gpio60", "gpio61",
|
|
|
|
"gpio62", "gpio63", "gpio64",
|
|
|
|
"gpio65", "gpio66", "gpio67",
|
|
|
|
"gpio68", "gpio69";
|
|
|
|
function = "qpic";
|
|
|
|
bias-pull-down;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
serial_0_pins: serial_pinmux {
|
|
|
|
mux {
|
|
|
|
pins = "gpio16", "gpio17";
|
|
|
|
function = "blsp_uart0";
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
spi_0_pins: spi_0_pinmux {
|
|
|
|
pinmux {
|
|
|
|
function = "blsp_spi0";
|
|
|
|
pins = "gpio13", "gpio14", "gpio15";
|
|
|
|
drive-strength = <12>;
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
pinmux_cs {
|
|
|
|
function = "gpio";
|
|
|
|
pins = "gpio12";
|
|
|
|
drive-strength = <2>;
|
|
|
|
bias-disable;
|
|
|
|
output-high;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&wifi0 {
|
|
|
|
status = "okay";
|
|
|
|
qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
|
|
|
|
};
|
|
|
|
|
|
|
|
&wifi1 {
|
|
|
|
status = "okay";
|
|
|
|
ieee80211-freq-limit = <5170000 5350000>;
|
|
|
|
qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
|
|
|
|
};
|