openwrt/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts

#include "qcom-ipq8064-v1.0.dtsi"

/ {
	model = "Qualcomm IPQ8064/DB149";
	compatible = "qcom,ipq8064-db149", "qcom,ipq8064";

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		rsvd@41200000 {
			reg = <0x41200000 0x300000>;
			no-map;
		};
	};

	alias {
		serial0 = &uart2;
		mdio-gpio0 = &mdio0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	soc {
		mdio0: mdio@37000000 {
			#address-cells = <1>;
			#size-cells = <0>;

			compatible = "qcom,ipq8064-mdio", "syscon";
			reg = <0x37000000 0x200000>;
			resets = <&gcc GMAC_CORE1_RESET>;
			reset-names = "stmmaceth";
			clocks = <&gcc GMAC_CORE1_CLK>;
			clock-names = "stmmaceth";

			pinctrl-0 = <&mdio0_pins>;
			pinctrl-names = "default";

			phy0: ethernet-phy@0 {
				reg = <0>;
				qca,ar8327-initvals = <
					0x00004 0x7600000   /* PAD0_MODE */
					0x00008 0x1000000   /* PAD5_MODE */
					0x0000c 0x80        /* PAD6_MODE */
					0x000e4 0x6a545     /* MAC_POWER_SEL */
					0x000e0 0xc74164de  /* SGMII_CTRL */
					0x0007c 0x4e        /* PORT0_STATUS */
					0x00094 0x4e        /* PORT6_STATUS */
				>;
			};

			phy4: ethernet-phy@4 {
				reg = <4>;
			};

			phy6: ethernet-phy@6 {
				reg = <6>;
			};

			phy7: ethernet-phy@7 {
				reg = <7>;
			};
		};
	};
};

&qcom_pinmux {
	i2c4_pins: i2c4_pinmux {
		pins = "gpio12", "gpio13";
		function = "gsbi4";
		bias-disable;
	};

	spi_pins: spi_pins {
		mux {
			pins = "gpio18", "gpio19", "gpio21";
			function = "gsbi5";
			drive-strength = <10>;
			bias-none;
		};
	};

	mdio0_pins: mdio0_pins {
		mux {
			pins = "gpio0", "gpio1";
			function = "mdio";
			drive-strength = <8>;
			bias-disable;
		};
	};

	rgmii0_pins: rgmii0_pins {
		mux {
			pins = "gpio2", "gpio66";
			drive-strength = <8>;
			bias-disable;
		};
	};
};

&gsbi2 {
	qcom,mode = <GSBI_PROT_I2C_UART>;
	status = "okay";
	uart2: serial@12490000 {
		status = "okay";
	};
};

&gsbi5 {
	qcom,mode = <GSBI_PROT_SPI>;
	status = "okay";

	spi4: spi@1a280000 {
		status = "okay";
		spi-max-frequency = <50000000>;

		pinctrl-0 = <&spi_pins>;
		pinctrl-names = "default";

		cs-gpios = <&qcom_pinmux 20 0>;

		m25p80@0 {
			compatible = "s25fl256s1";
			#address-cells = <1>;
			#size-cells = <1>;
			spi-max-frequency = <50000000>;
			reg = <0>;
			m25p,fast-read;

			partition@0 {
				label = "lowlevel_init";
				reg = <0x0 0x1b0000>;
			};

			partition@1 {
				label = "u-boot";
				reg = <0x1b0000 0x80000>;
			};

			partition@2 {
				label = "u-boot-env";
				reg = <0x230000 0x40000>;
			};

			partition@3 {
				label = "caldata";
				reg = <0x270000 0x40000>;
			};

			partition@4 {
				label = "firmware";
				reg = <0x2b0000 0x1d50000>;
			};
		};
	};
};

&sata_phy {
	status = "okay";
};

&sata {
	status = "okay";
};

&usb3_0 {
	status = "okay";
};

&usb3_1 {
	status = "okay";
};

&pcie0 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

&pcie2 {
	status = "okay";
};

&gmac0 {
	status = "okay";
	phy-mode = "rgmii";
	qcom,id = <0>;
	phy-handle = <&phy4>;

	pinctrl-0 = <&rgmii0_pins>;
	pinctrl-names = "default";
};

&gmac1 {
	status = "okay";
	phy-mode = "sgmii";
	qcom,id = <1>;

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&gmac2 {
	status = "okay";
	phy-mode = "sgmii";
	qcom,id = <2>;
	phy-handle = <&phy6>;
};

&gmac3 {
	status = "okay";
	phy-mode = "sgmii";
	qcom,id = <3>;
	phy-handle = <&phy7>;
};