mirror of https://github.com/hak5/openwrt.git
54 lines
1.6 KiB
Diff
54 lines
1.6 KiB
Diff
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commit 22250a38f970c173acb1b3fb30e6dce1430f697b
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Author: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Thu Sep 19 22:48:35 2013 +0200
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MIPS: BCM47XX: add EARLY_PRINTK_8250 support
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The BCM47xx SoCs have a 8250 serial compatible console at address
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0x18000300 and an other at 0x18000400. On most devices 0x18000300 is
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wired to some pins on the board, we should use that.
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This is the smae for the AI (bcma) and the SB (ssb) bus, this is some
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offset on the chip common core.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -117,6 +117,8 @@ config BCM47XX
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select NO_EXCEPT_FILL
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_LITTLE_ENDIAN
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+ select SYS_HAS_EARLY_PRINTK
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+ select EARLY_PRINTK_8250 if EARLY_PRINTK
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help
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Support for BCM47XX based boards
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--- a/arch/mips/bcm47xx/prom.c
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+++ b/arch/mips/bcm47xx/prom.c
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@@ -28,6 +28,8 @@
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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+#include <linux/ssb/ssb_driver_chipcommon.h>
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+#include <linux/ssb/ssb_regs.h>
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#include <linux/smp.h>
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#include <asm/bootinfo.h>
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#include <bcm47xx.h>
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@@ -94,9 +96,16 @@ static __init void prom_init_mem(void)
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add_memory_region(0, mem, BOOT_MEM_RAM);
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}
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+/*
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+ * This is the first serial on the chip common core, it is at this position
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+ * for sb (ssb) and ai (bcma) bus.
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+ */
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+#define BCM47XX_SERIAL_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART0_DATA)
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+
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void __init prom_init(void)
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{
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prom_init_mem();
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+ setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
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}
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void __init prom_free_prom_memory(void)
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