mirror of https://github.com/hak5/openwrt.git
250 lines
11 KiB
C
250 lines
11 KiB
C
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/* ============================================================================
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* Copyright (C) 2003[- 2004] ? Infineon Technologies AG.
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*
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* All rights reserved.
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* ============================================================================
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*
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* ============================================================================
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*
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* This document contains proprietary information belonging to Infineon
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* Technologies AG. Passing on and copying of this document, and communication
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* of its contents is not permitted without prior written authorisation.
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*
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* ============================================================================
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*
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* File Name: ifx_cfg.h
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* Author : Mars Lin (mars.lin@infineon.com)
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* Date:
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*
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* ===========================================================================
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*
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* Project:
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* Block:
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*
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* ===========================================================================
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* Contents: This file contains the data structures and definitions used
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* by the core iptables and the sip alg modules.
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* ===========================================================================
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* References:
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*/
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/*
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* This file contains the configuration parameters for the IFX board.
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*/
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#ifndef _DANUBE_CFG_H_
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#define _DANUBE_CFG_H_
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/*-----------------------------------------------------------------------
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* U-Boot/Kernel configurations
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*/
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#define IFX_CFG_UBOOT_DEFAULT_CFG_IPADDR "172.20.80.100"
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#define IFX_CFG_UBOOT_DEFAULT_CFG_SERVERIP "172.20.80.2"
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#define IFX_CFG_UBOOT_DEFAULT_CFG_ETHADDR "00:E0:92:00:01:40"
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#define IFX_CFG_UBOOT_DEFAULT_CFG_NETDEV "eth1"
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#define IFX_CFG_UBOOT_DEFAULT_CFG_BAUDRATE "115200"
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#define IFX_CFG_UBOOT_LOAD_ADDRESS "0x80800000"
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/* End of U-Boot/Kernel configurations
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*-----------------------------------------------------------------------
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*/
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/*-----------------------------------------------------------------------
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* Board specific configurations
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*/
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#ifdef IFX_CONFIG_MEMORY_SIZE
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#define IFX_CFG_MEM_SIZE 31
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#else
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#error "ERROR!! Define memory size first!"
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#endif
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//2MB flash partition
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#if (IFX_CONFIG_FLASH_SIZE == 2)
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#define IFX_CFG_FLASH_PARTITIONS_INFO \
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"part0_begin=0xB0000000\0" \
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"part1_begin=0xB0010000\0" \
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"part2_begin=0xB0050000\0" \
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"total_part=3\0"
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#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
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"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
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"data_block1=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
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"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
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"data_block3=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
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"data_block4=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
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"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
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"data_block6=" IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "\0" \
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"data_block7=" IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "\0" \
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"total_db=8\0"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
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#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB0010000
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0050000
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB01FCFFF
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#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
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#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB01FD000
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#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0
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#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB01FEFFF
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#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
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#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB01FF000
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#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x0C00
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#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB01FFBFF
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "fwdiag"
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_START_ADDR 0xB31FFC00
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_SIZE 0x0200
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_END_ADDR 0xB01FFDFF
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#define IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "calibration"
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#define IFX_CFG_FLASH_CALIBRATION_CFG_START_ADDR 0xB01FFE00
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#define IFX_CFG_FLASH_CALIBRATION_CFG_SIZE 0x0200
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#define IFX_CFG_FLASH_CALIBRATION_CFG_END_ADDR 0xB01FFFFF
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#define IFX_CFG_FLASH_END_ADDR 0xB01FFFFF
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//4MB flash partition
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#elif (IFX_CONFIG_FLASH_SIZE == 4)
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#define IFX_CFG_FLASH_PARTITIONS_INFO \
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"part0_begin=0xB0000000\0" \
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"part1_begin=0xB0020000\0" \
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"part2_begin=0xB0060000\0" \
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"total_part=3\0"
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#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
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"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
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"data_block1=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
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"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
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"data_block3=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
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"data_block4=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
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"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
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"data_block6=" IFX_CFG_FLASH_VOIP_CFG_BLOCK_NAME "\0" \
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"data_block7=" IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "\0" \
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"data_block8=" IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "\0" \
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"total_db=9\0"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
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#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB0020000
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0060000
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB03F4FFF
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#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0
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#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
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#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB03F5000
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#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0x2000
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#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB03F6FFF
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#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
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#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB03F7000
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#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x0C00
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#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB03F7BFF
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#define IFX_CFG_FLASH_VOIP_CFG_BLOCK_NAME "voip"
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#define IFX_CFG_FLASH_VOIP_CFG_START_ADDR 0xB03F7C00
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#define IFX_CFG_FLASH_VOIP_CFG_SIZE 0x8000
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#define IFX_CFG_FLASH_VOIP_CFG_END_ADDR 0xB03FFBFF
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "fwdiag"
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_START_ADDR 0xB03FFC00
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_SIZE 0x0200
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#define IFX_CFG_FLASH_FIRMWARE_DIAG_END_ADDR 0xB03FFDFF
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#define IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "calibration"
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#define IFX_CFG_FLASH_CALIBRATION_CFG_START_ADDR 0xB03FFE00
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#define IFX_CFG_FLASH_CALIBRATION_CFG_SIZE 0x0200
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#define IFX_CFG_FLASH_CALIBRATION_CFG_END_ADDR 0xB03FFFFF
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#define IFX_CFG_FLASH_END_ADDR 0xB03FFFFF
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//8MB flash definition
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#elif (IFX_CONFIG_FLASH_SIZE == 8)
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#define IFX_CFG_FLASH_PARTITIONS_INFO \
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"part0_begin=0xB0000000\0" \
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"part1_begin=0xB0080000\0" \
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"part2_begin=0xB0280000\0" \
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"part3_begin=0xB0790000\0" \
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"part4_begin=0xB07A0000\0" \
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"part5_begin=0xB07E0000\0" \
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"total_part=6\0"
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#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
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"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
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"data_block1=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
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"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
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"data_block3=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
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"data_block4=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
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"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
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"total_db=6\0"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
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#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
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#define IFX_CFG_FLASH_UBOOT_IMAGE_END_ADDR 0xB007FFFF
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#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0x00080000
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#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
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#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB0080000
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#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0x200000
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#define IFX_CFG_FLASH_KERNEL_IMAGE_END_ADDR 0xB017FFFF
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#define IFX_CFG_FLASH_KERNEL_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0280000
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0x00510000
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_END_ADDR 0xB078FFFF
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#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
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#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
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#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB0790000
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#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0x10000
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#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB079FFFF
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#define IFX_CFG_FLASH_SYSTEM_CFG_MTDBLOCK_NAME "/dev/mtdblock3"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB07A0000
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0x40000
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_END_ADDR 0xB07DFFFF
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#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock4"
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#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
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#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB0020000
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#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB002FFFF
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#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x10000
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#define IFX_CFG_FLASH_UBOOT_CFG_MTDBLOCK_NAME "/dev/mtdblock5"
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#define IFX_CFG_FLASH_END_ADDR 0xB07FFFFF
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#else
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#error "ERROR!! Define flash size first!"
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#endif
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/* End of Board specific configurations
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*-----------------------------------------------------------------------
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*/
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#endif
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