mirror of https://github.com/hak5/openwrt.git
66 lines
2.1 KiB
Diff
66 lines
2.1 KiB
Diff
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From 2764703c3c896d427731391aa978c536aaf4cb91 Mon Sep 17 00:00:00 2001
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From: Jes Sorensen <Jes.Sorensen@redhat.com>
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Date: Tue, 30 Aug 2016 17:23:35 -0400
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Subject: [PATCH] rtl8xxxu: Correct power down sequence for 8188eu
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This matches the vendor driver more correctly
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Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
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---
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.../net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 26 ++++++++++++++++------
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1 file changed, 19 insertions(+), 7 deletions(-)
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--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
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+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
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@@ -1083,7 +1083,8 @@ static void rtl8188e_disabled_to_emu(str
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u16 val16;
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val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
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- val16 &= ~(APS_FSMCO_PFM_WOWL | APS_FSMCO_ENABLE_POWERDOWN);
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+ val16 &= ~(APS_FSMCO_PFM_WOWL | APS_FSMCO_ENABLE_POWERDOWN |
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+ APS_FSMCO_HW_POWERDOWN);
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rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
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}
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@@ -1196,15 +1197,26 @@ static int rtl8188eu_emu_to_disabled(str
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{
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u8 val8;
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- /* 0x04[12:11] = 01 enable WL suspend */
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- val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 2);
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- val8 &= ~BIT(0);
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- rtl8xxxu_write8(priv, REG_APS_FSMCO + 2, val8);
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+ val8 = rtl8xxxu_read8(priv, REG_AFE_XTAL_CTRL + 2);
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+ val8 |= BIT(7);
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+ rtl8xxxu_write8(priv, REG_AFE_XTAL_CTRL + 2, val8);
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val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
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- val8 |= BIT(7);
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+ val8 &= ~(BIT(3) | BIT(4));
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+ val8 |= BIT(3);
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rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
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+ rtl8xxxu_write8(priv, REG_APS_FSMCO + 3, 0x00);
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+
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+ val8 = rtl8xxxu_read8(priv, REG_GPIO_MUXCFG + 1);
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+ val8 &= ~BIT(4);
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+ rtl8xxxu_write8(priv, REG_GPIO_MUXCFG + 1, val8);
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+
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+ /* Set USB suspend enable local register 0xfe10[4]=1 */
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+ val8 = rtl8xxxu_read8(priv, 0xfe10);
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+ val8 |= BIT(4);
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+ rtl8xxxu_write8(priv, 0xfe10, val8);
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+
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return 0;
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}
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@@ -1339,7 +1351,7 @@ void rtl8188eu_power_off(struct rtl8xxxu
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rtl8xxxu_write8(priv, REG_GPIO_PIN_CTRL + 2, 0xff);
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val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL);
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- rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 << 4);
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+ rtl8xxxu_write8(priv, REG_GPIO_IO_SEL, val8 << 4);
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val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL + 1);
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rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 | 0x0f);
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