mirror of https://github.com/hak5/openwrt.git
57 lines
1.4 KiB
Diff
57 lines
1.4 KiB
Diff
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From 92c6f000cb3a4280166d812d88cda3011717b548 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Wed, 7 Dec 2016 08:56:55 +0100
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Subject: [PATCH 6/6] ARM: BCM53573: Specify USB ports of on-SoC controllers
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Broadcom OHCI and EHCI controllers always have 2 ports each on the root
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hub. Describe them in DT to allow specifying extra info or referencing
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port nodes.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm53573.dtsi | 22 ++++++++++++++++++++++
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1 file changed, 22 insertions(+)
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--- a/arch/arm/boot/dts/bcm53573.dtsi
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+++ b/arch/arm/boot/dts/bcm53573.dtsi
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@@ -124,6 +124,17 @@
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reg = <0x4000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ehci_port1: port@1 {
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+ reg = <1>;
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+ };
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+
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+ ehci_port2: port@2 {
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+ reg = <2>;
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+ };
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};
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ohci: ohci@d000 {
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@@ -133,6 +144,17 @@
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reg = <0xd000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ohci_port1: port@1 {
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+ reg = <1>;
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+ };
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+
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+ ohci_port2: port@2 {
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+ reg = <2>;
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+ };
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};
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};
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