mirror of https://github.com/hak5/openwrt.git
374 lines
14 KiB
C
374 lines
14 KiB
C
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/*
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<:copyright-gpl
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Copyright 2002 Broadcom Corp. All Rights Reserved.
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This program is free software; you can distribute it and/or modify it
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under the terms of the GNU General Public License (Version 2) as
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published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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:>
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*/
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/***********************************************************************/
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/* */
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/* MODULE: board.h */
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/* DATE: 97/02/18 */
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/* PURPOSE: Board specific information. This module should include */
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/* all base device addresses and board specific macros. */
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/* */
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/***********************************************************************/
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#ifndef _BOARD_H
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#define _BOARD_H
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/*****************************************************************************/
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/* Misc board definitions */
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/*****************************************************************************/
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#define DYING_GASP_API
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/*****************************************************************************/
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/* Physical Memory Map */
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/*****************************************************************************/
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#define PHYS_DRAM_BASE 0x00000000 /* Dynamic RAM Base */
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#define PHYS_FLASH_BASE 0x1FC00000 /* Flash Memory */
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/*****************************************************************************/
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/* Note that the addresses above are physical addresses and that programs */
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/* have to use converted addresses defined below: */
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/*****************************************************************************/
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#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
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#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
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#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
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/*****************************************************************************/
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/* Select the PLL value to get the desired CPU clock frequency. */
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/* */
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/* */
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/*****************************************************************************/
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#define FPERIPH 50000000
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#define ONEK 1024
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#define BLK64K (64*ONEK)
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#define FLASH45_BLKS_BOOT_ROM 1
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#define FLASH45_LENGTH_BOOT_ROM (FLASH45_BLKS_BOOT_ROM * BLK64K)
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#define FLASH_RESERVED_AT_END (64*ONEK) /*reserved for PSI, scratch pad*/
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/*****************************************************************************/
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/* Note that the addresses above are physical addresses and that programs */
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/* have to use converted addresses defined below: */
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/*****************************************************************************/
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#define DRAM_BASE (0x80000000 | PHYS_DRAM_BASE) /* cached DRAM */
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#define DRAM_BASE_NOCACHE (0xA0000000 | PHYS_DRAM_BASE) /* uncached DRAM */
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#define FLASH_BASE (0xA0000000 | PHYS_FLASH_BASE) /* uncached Flash */
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/*****************************************************************************/
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/* Select the PLL value to get the desired CPU clock frequency. */
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/* */
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/* */
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/*****************************************************************************/
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#define FPERIPH 50000000
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#define SDRAM_TYPE_ADDRESS_OFFSET 16
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#define NVRAM_DATA_OFFSET 0x0580
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#define NVRAM_DATA_ID 0x0f1e2d3c
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#define BOARD_SDRAM_TYPE *(unsigned long *) \
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(FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
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#define ONEK 1024
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#define BLK64K (64*ONEK)
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// nvram and psi flash definitions for 45
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#define FLASH45_LENGTH_NVRAM ONEK // 1k nvram
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#define NVRAM_PSI_DEFAULT 24 // default psi in K byes
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/*****************************************************************************/
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/* NVRAM Offset and definition */
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/*****************************************************************************/
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#define NVRAM_VERSION_NUMBER 2
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#define NVRAM_VERSION_NUMBER_ADDRESS 0
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#define NVRAM_BOOTLINE_LEN 256
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#define NVRAM_BOARD_ID_STRING_LEN 16
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#define NVRAM_MAC_ADDRESS_LEN 6
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#define NVRAM_MAC_COUNT_MAX 32
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/*****************************************************************************/
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/* Misc Offsets */
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/*****************************************************************************/
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#define CFE_VERSION_OFFSET 0x0570
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#define CFE_VERSION_MARK_SIZE 5
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#define CFE_VERSION_SIZE 5
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typedef struct
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{
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unsigned long ulVersion;
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char szBootline[NVRAM_BOOTLINE_LEN];
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char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
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unsigned long ulReserved1[2];
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unsigned long ulNumMacAddrs;
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unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
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char chReserved[2];
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unsigned long ulCheckSum;
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} NVRAM_DATA, *PNVRAM_DATA;
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/*****************************************************************************/
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/* board ioctl calls for flash, led and some other utilities */
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/*****************************************************************************/
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/* Defines. for board driver */
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#define BOARD_IOCTL_MAGIC 'B'
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#define BOARD_DRV_MAJOR 206
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#define MAC_ADDRESS_ANY (unsigned long) -1
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#define BOARD_IOCTL_FLASH_INIT \
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_IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_FLASH_WRITE \
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_IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_FLASH_READ \
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_IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_NR_PAGES \
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_IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_DUMP_ADDR \
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_IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_SET_MEMORY \
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_IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_MIPS_SOFT_RESET \
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_IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_LED_CTRL \
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_IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_ID \
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_IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_MAC_ADDRESS \
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_IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
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_IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_PSI_SIZE \
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_IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_SDRAM_SIZE \
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_IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_SET_MONITOR_FD \
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_IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
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_IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_BOOTLINE \
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_IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_SET_BOOTLINE \
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_IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
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_IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_CHIP_ID \
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_IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_NUM_ENET \
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_IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_CFE_VER \
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_IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_ENET_CFG \
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_IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
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_IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_SET_TRIGGER_EVENT \
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_IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_GET_TRIGGER_EVENT \
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_IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
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_IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
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#define BOARD_IOCTL_SET_SES_LED \
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_IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
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//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
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#define RESET_BUTTON_UP 1
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#define RESET_BUTTON_PRESSDOWN 0
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#define BOARD_IOCTL_GET_RESETHOLD \
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_IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
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//>>JUNHON, 2004/09/15
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// for the action in BOARD_IOCTL_PARMS for flash operation
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typedef enum
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{
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PERSISTENT,
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NVRAM,
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BCM_IMAGE_CFE,
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BCM_IMAGE_FS,
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BCM_IMAGE_KERNEL,
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BCM_IMAGE_WHOLE,
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SCRATCH_PAD,
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FLASH_SIZE,
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} BOARD_IOCTL_ACTION;
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typedef struct boardIoctParms
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{
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char *string;
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char *buf;
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int strLen;
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int offset;
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BOARD_IOCTL_ACTION action; /* flash read/write: nvram, persistent, bcm image */
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int result;
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} BOARD_IOCTL_PARMS;
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// LED defines
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typedef enum
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{
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kLedAdsl,
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kLedWireless,
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kLedUsb,
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kLedHpna,
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kLedWanData,
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kLedPPP,
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kLedVoip,
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kLedSes,
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kLedLan,
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kLedSelfTest,
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kLedEnd, // NOTE: Insert the new led name before this one. Alway stay at the end.
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} BOARD_LED_NAME;
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typedef enum
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{
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kLedStateOff, /* turn led off */
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kLedStateOn, /* turn led on */
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kLedStateFail, /* turn led on red */
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kLedStateBlinkOnce, /* blink once, ~100ms and ignore the same call during the 100ms period */
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kLedStateSlowBlinkContinues, /* slow blink continues at ~600ms interval */
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kLedStateFastBlinkContinues, /* fast blink continues at ~200ms interval */
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} BOARD_LED_STATE;
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// virtual and physical map pair defined in board.c
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typedef struct ledmappair
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{
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BOARD_LED_NAME ledName; // virtual led name
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BOARD_LED_STATE ledInitState; // initial led state when the board boots.
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unsigned short ledMask; // physical GPIO pin mask
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unsigned short ledActiveLow; // reset bit to turn on LED
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unsigned short ledMaskFail; // physical GPIO pin mask for state failure
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unsigned short ledActiveLowFail;// reset bit to turn on LED
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} LED_MAP_PAIR, *PLED_MAP_PAIR;
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typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
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/* Flash storage address information that is determined by the flash driver. */
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typedef struct flashaddrinfo
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{
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int flash_persistent_start_blk;
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int flash_persistent_number_blk;
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int flash_persistent_length;
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unsigned long flash_persistent_blk_offset;
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int flash_scratch_pad_start_blk; // start before psi (SP_BUF_LEN)
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int flash_scratch_pad_number_blk;
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int flash_scratch_pad_length;
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unsigned long flash_scratch_pad_blk_offset;
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int flash_nvram_start_blk;
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int flash_nvram_number_blk;
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int flash_nvram_length;
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unsigned long flash_nvram_blk_offset;
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} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
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// scratch pad defines
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/* SP - Persisten Scratch Pad format:
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sp header : 32 bytes
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tokenId-1 : 8 bytes
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tokenId-1 len : 4 bytes
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tokenId-1 data
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....
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tokenId-n : 8 bytes
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tokenId-n len : 4 bytes
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tokenId-n data
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*/
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#define MAGIC_NUM_LEN 8
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#define MAGIC_NUMBER "gOGoBrCm"
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#define TOKEN_NAME_LEN 16
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#define SP_VERSION 1
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#define SP_MAX_LEN 8 * 1024 // 8k buf before psi
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#define SP_RESERVERD 16
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typedef struct _SP_HEADER
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{
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char SPMagicNum[MAGIC_NUM_LEN]; // 8 bytes of magic number
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int SPVersion; // version number
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int SPUsedLen; // used sp len
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char SPReserved[SP_RESERVERD]; // reservied, total 32 bytes
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} SP_HEADER, *PSP_HEADER;
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typedef struct _TOKEN_DEF
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{
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char tokenName[TOKEN_NAME_LEN];
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int tokenLen;
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} SP_TOKEN, *PSP_TOKEN;
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/*****************************************************************************/
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/* Function Prototypes */
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/*****************************************************************************/
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#if !defined(__ASM_ASM_H)
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void dumpaddr( unsigned char *pAddr, int nLen );
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int kerSysNvRamGet(char *string, int strLen, int offset);
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int kerSysNvRamSet(char *string, int strLen, int offset);
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int kerSysPersistentGet(char *string, int strLen, int offset);
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int kerSysPersistentSet(char *string, int strLen, int offset);
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int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
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int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
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int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
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int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
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||
|
|
int kerSysReleaseMacAddress( unsigned char *pucaAddr );
|
||
|
|
int kerSysGetSdramSize( void );
|
||
|
|
void kerSysGetBootline(char *string, int strLen);
|
||
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|
void kerSysSetBootline(char *string, int strLen);
|
||
|
|
void kerSysMipsSoftReset(void);
|
||
|
|
void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
|
||
|
|
void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
|
||
|
|
int kerSysFlashSizeGet(void);
|
||
|
|
void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
|
||
|
|
void kerSysDeregisterDyingGaspHandler(char *devname);
|
||
|
|
void kerSysWakeupMonitorTask( void );
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#define BOOT_CFE 0
|
||
|
|
#define BOOT_REDBOOT 1
|
||
|
|
|
||
|
|
extern int boot_loader_type;
|
||
|
|
|
||
|
|
#endif /* _BOARD_H */
|
||
|
|
|