2008-07-26 10:53:23 +00:00
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--- a/arch/arm/mach-at91/at91rm9200_devices.c
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+++ b/arch/arm/mach-at91/at91rm9200_devices.c
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2008-11-07 08:44:56 +00:00
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@@ -1001,7 +1001,15 @@ static inline void configure_usart0_pins
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2008-07-04 16:05:00 +00:00
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* We need to drive the pin manually. Default is off (RTS is active low).
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*/
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at91_set_gpio_output(AT91_PIN_PA21, 1);
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- }
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+ }
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+ if (pins & ATMEL_UART_DTR)
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+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
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+ if (pins & ATMEL_UART_RI)
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+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
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+ if (pins & ATMEL_UART_DCD) {
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+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
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+ at91_set_deglitch(AT91_PIN_PA19, 1);
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+ }
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}
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static struct resource uart1_resources[] = {
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2008-11-07 08:44:56 +00:00
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@@ -1139,6 +1147,14 @@ static inline void configure_usart3_pins
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2008-07-04 16:05:00 +00:00
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at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
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+ if (pins & ATMEL_UART_DTR)
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+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
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+ if (pins & ATMEL_UART_RI)
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+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
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+ if (pins & ATMEL_UART_DCD) {
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+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
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+ at91_set_deglitch(AT91_PIN_PA24, 1);
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+ }
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}
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static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
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