mirror of https://github.com/hak5/openwrt.git
66 lines
2.2 KiB
Diff
66 lines
2.2 KiB
Diff
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From 27d53aa3a33766bb3882f1adcf73c0b3402a5572 Mon Sep 17 00:00:00 2001
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From: Andy Green <andy@openmoko.com>
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Date: Mon, 4 Aug 2008 08:34:51 +0100
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Subject: [PATCH] fix-glamo-turbo-host-interface.patch
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Signed-off-by: Andy Green <andy@openmoko.com>
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---
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arch/arm/mach-s3c2440/mach-gta02.c | 4 ++++
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drivers/mfd/glamo/glamo-core.c | 12 ++++++------
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2 files changed, 10 insertions(+), 6 deletions(-)
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diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
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index 8e43c4a..be2d901 100644
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--- a/arch/arm/mach-s3c2440/mach-gta02.c
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+++ b/arch/arm/mach-s3c2440/mach-gta02.c
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@@ -66,6 +66,7 @@
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#include <asm/arch/spi.h>
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#include <asm/arch/spi-gpio.h>
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#include <asm/arch/usb-control.h>
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+#include <asm/arch/regs-mem.h>
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#include <asm/arch/gta02.h>
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@@ -1562,6 +1563,9 @@ static void __init gta02_machine_init(void)
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spin_lock_init(&motion_irq_lock);
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+ /* Glamo chip select optimization */
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+/* *((u32 *)(S3C2410_MEMREG(((1 + 1) << 2)))) = 0x1280; */
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+
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s3c_device_usb.dev.platform_data = >a02_usb_info;
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s3c_device_nand.dev.platform_data = >a02_nand_info;
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s3c_device_sdi.dev.platform_data = >a02_mmc_cfg;
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diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
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index 0e7a650..92dbd65 100644
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--- a/drivers/mfd/glamo/glamo-core.c
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+++ b/drivers/mfd/glamo/glamo-core.c
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@@ -740,18 +740,18 @@ static struct glamo_script glamo_init_script[] = {
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{ GLAMO_REG_CLOCK_GEN7, 0x0101 },
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{ GLAMO_REG_CLOCK_GEN8, 0x0100 },
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{ GLAMO_REG_CLOCK_HOST, 0x000d },
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- { 0x200, 0x0ef0 },
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+ /*
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+ * b7..b4 = 0 = no wait states on read or write
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+ * b0 = 1 select PLL2 for Host interface, b1 = enable it
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+ */
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+ { 0x200, 0x0e03 },
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{ 0x202, 0x07ff },
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{ 0x212, 0x0000 },
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{ 0x214, 0x4000 },
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{ 0x216, 0xf00e },
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{ GLAMO_REG_MEM_TYPE, 0x0874 }, /* 8MB, 16 word pg wr+rd */
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{ GLAMO_REG_MEM_GEN, 0xafaf }, /* 63 grants min + max */
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- /*
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- * the register below originally 0x0108 makes unreliable Glamo MMC
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- * write operations. Cranked to 0x05ad to add a wait state, the
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- * unreliability is not seen after 4GB of write / read testing
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- */
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+
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{ GLAMO_REG_MEM_TIMING1, 0x0108 },
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{ GLAMO_REG_MEM_TIMING2, 0x0010 }, /* Taa = 3 MCLK */
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{ GLAMO_REG_MEM_TIMING3, 0x0000 },
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--
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1.5.6.3
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