mirror of https://github.com/hak5/openwrt.git
44 lines
1.4 KiB
Diff
44 lines
1.4 KiB
Diff
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From 51d5029bd9cd0ff85e1df87a4df57e544c52dc34 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 30 Jan 2013 20:16:22 +0100
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Subject: [PATCH 14/40] PINCTRL: lantiq: fix pin availability check
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The clock needs to be activated for the check to work. In order to be compatible
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with future silicon make sure that at least 1 pin is available before probing
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the pad controller.
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Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/pinctrl/pinctrl-falcon.c | 11 ++++++++---
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1 file changed, 8 insertions(+), 3 deletions(-)
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diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
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index 4a0d54a..de9d1db 100644
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--- a/drivers/pinctrl/pinctrl-falcon.c
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+++ b/drivers/pinctrl/pinctrl-falcon.c
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@@ -455,12 +455,17 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
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*bank);
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return -ENOMEM;
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}
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+ clk_activate(falcon_info.clk[*bank]);
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avail = pad_r32(falcon_info.membase[*bank],
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LTQ_PADC_AVAIL);
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pins = fls(avail);
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- lantiq_load_pin_desc(&falcon_pads[pad_count], *bank, pins);
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- pad_count += pins;
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- clk_enable(falcon_info.clk[*bank]);
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+ if (pins) {
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+ lantiq_load_pin_desc(&falcon_pads[pad_count],
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+ *bank, pins);
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+ pad_count += pins;
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+ } else {
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+ clk_deactivate(falcon_info.clk[*bank]);
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+ }
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dev_dbg(&pdev->dev, "found %s with %d pads\n",
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res.name, pins);
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}
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--
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1.7.10.4
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