mirror of https://github.com/hak5/openwrt.git
50 lines
1.8 KiB
Diff
50 lines
1.8 KiB
Diff
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From 8432dc7c8a843e7c35d7624adc6653e13dd488a7 Mon Sep 17 00:00:00 2001
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From: Daniel Matuschek <info@crazy-audio.com>
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Date: Wed, 15 Jan 2014 21:41:23 +0100
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Subject: [PATCH] ASoC: wm8804: Implement MCLK configuration options, add 32bit
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support WM8804 can run with PLL frequencies of 256xfs and 128xfs for most
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sample rates. At 192kHz only 128xfs is supported. The existing driver selects
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128xfs automatically for some lower samples rates. By using an additional
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mclk_div divider, it is now possible to control the behaviour. This allows
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using 256xfs PLL frequency on all sample rates up to 96kHz. It should allow
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lower jitter and better signal quality. The behavior has to be controlled by
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the sound card driver, because some sample frequency share the same setting.
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e.g. 192kHz and 96kHz use 24.576MHz master clock. The only difference is the
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MCLK divider.
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This also added support for 32bit data.
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Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
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---
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sound/soc/codecs/wm8804.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/sound/soc/codecs/wm8804.c
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+++ b/sound/soc/codecs/wm8804.c
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@@ -304,6 +304,7 @@ static int wm8804_hw_params(struct snd_p
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blen = 0x1;
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break;
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case 24:
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+ case 32:
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blen = 0x2;
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break;
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default:
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@@ -515,7 +516,7 @@ static const struct snd_soc_dai_ops wm88
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};
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#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
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- SNDRV_PCM_FMTBIT_S24_LE)
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+ SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
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#define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
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@@ -543,7 +544,7 @@ static struct snd_soc_dai_driver wm8804_
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};
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static const struct snd_soc_codec_driver soc_codec_dev_wm8804 = {
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- .idle_bias_off = true,
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+ .idle_bias_off = false,
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.component_driver = {
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.dapm_widgets = wm8804_dapm_widgets,
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