mirror of https://github.com/hak5/openwrt.git
59 lines
1.4 KiB
Diff
59 lines
1.4 KiB
Diff
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From 1b47b98acce2db0da632d056821420b33205b8b2 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 19 Apr 2016 08:56:46 +0200
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Subject: [PATCH] ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Controller is present on every BCM4708* board but only few devices have
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serial flash attached so mark it as disabled by default.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
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+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
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@@ -59,3 +59,7 @@
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&uart0 {
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status = "okay";
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};
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+
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+&spi_nor {
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+ status = "okay";
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+};
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--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
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+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
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@@ -122,3 +122,7 @@
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&uart0 {
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status = "okay";
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};
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+
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+&spi_nor {
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+ status = "okay";
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+};
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -225,6 +225,20 @@
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#address-cells = <1>;
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#size-cells = <1>;
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};
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+
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+ spi@29000 {
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+ reg = <0x00029000 0x1000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ spi_nor: spi-nor@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <20000000>;
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+ linux,part-probe = "ofpart", "bcm47xxpart";
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+ status = "disabled";
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+ };
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+ };
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};
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lcpll0: lcpll0@1800c100 {
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