2018-11-02 22:50:25 +00:00
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#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/mips/lantiq_rcu_gphy.h>
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/ {
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memory@0 {
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2019-01-27 11:20:21 +00:00
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device_type = "memory";
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2018-11-02 22:50:25 +00:00
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reg = <0x0 0x7f00000>;
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "USB_VBUS";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mtd-mac-address = <&romfile 0xf100>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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// gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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};
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ethernet@5 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "rgmii";
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phy-handle = <&phy5>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "gmii";
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phy-handle = <&phy11>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "gmii";
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phy-handle = <&phy13>;
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};
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};
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2019-01-27 12:21:06 +00:00
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mdio {
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2018-11-02 22:50:25 +00:00
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy5: ethernet-phy@5 {
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reg = <0x5>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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&gphy0 {
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lantiq,gphy-mode = <GPHY_MODE_GE>;
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};
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&gphy1 {
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lantiq,gphy-mode = <GPHY_MODE_GE>;
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};
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&gpio {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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gphy-leds {
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lantiq,groups = "gphy0 led1", "gphy1 led1";
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lantiq,function = "gphy";
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lantiq,pull = <2>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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phy-rst {
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lantiq,pins = "io42";
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lantiq,pull = <0>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io38";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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&pci0 {
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status = "okay";
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gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
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};
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&spi {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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2018-12-30 11:17:25 +00:00
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flash@4 {
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2018-11-02 22:50:25 +00:00
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compatible = "jedec,spi-nor";
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2019-01-27 12:42:51 +00:00
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reg = <4>;
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2018-11-02 22:50:25 +00:00
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spi-max-frequency = <33250000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x0 0x20000>;
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label = "u-boot";
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read-only;
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};
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partition@20000 {
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reg = <0x20000 0xf90000>;
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label = "firmware";
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};
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partition@fb0000 {
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reg = <0xfb0000 0x10000>;
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label = "radioDECT";
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read-only;
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};
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partition@fc0000 {
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reg = <0xfc0000 0x10000>;
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label = "config";
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read-only;
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};
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romfile: partition@fd0000 {
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reg = <0xfd0000 0x10000>;
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label = "romfile";
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read-only;
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};
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partition@fe0000 {
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reg = <0xfe0000 0x10000>;
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label = "rom";
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read-only;
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};
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partition@ff0000 {
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reg = <0xff0000 0x10000>;
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label = "radio";
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read-only;
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};
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};
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};
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};
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&usb_phy0 {
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status = "okay";
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};
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&usb_phy1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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vbus-supply = <&usb_vbus>;
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};
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&usb1 {
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status = "okay";
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vbus-supply = <&usb_vbus>;
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};
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