mirror of https://github.com/hak5/openwrt.git
57 lines
1.9 KiB
Diff
57 lines
1.9 KiB
Diff
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From 40889884d53094fe9987a45f9df99fdf1f311910 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Sun, 16 Feb 2014 10:47:51 +0100
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Subject: [PATCH] sunxi-mmc: Simplify clk delay setting
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clk_sunxi_mmc_phase_control() does its own locking, so there is no need to
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lock at the host. Without the locking having a separate sunxi_mmc_set_clk_dly()
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makes no sense, so simply call clk_sunxi_mmc_phase_control() directly.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/mmc/host/sunxi-mmc.c | 14 ++------------
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1 file changed, 2 insertions(+), 12 deletions(-)
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diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
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index f33bc30..f4bfaf0 100644
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--- a/drivers/mmc/host/sunxi-mmc.c
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+++ b/drivers/mmc/host/sunxi-mmc.c
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@@ -420,17 +420,6 @@ static void sunxi_mmc_oclk_onoff(struct sunxi_mmc_host *host, u32 oclk_en)
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}
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}
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-static void sunxi_mmc_set_clk_dly(struct sunxi_mmc_host *smc_host,
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- u32 oclk_dly, u32 sclk_dly)
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-{
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- unsigned long iflags;
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- struct clk_hw *hw = __clk_get_hw(smc_host->clk_mod);
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-
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- spin_lock_irqsave(&smc_host->lock, iflags);
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- clk_sunxi_mmc_phase_control(hw, sclk_dly, oclk_dly);
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- spin_unlock_irqrestore(&smc_host->lock, iflags);
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-}
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-
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struct sunxi_mmc_clk_dly mmc_clk_dly[MMC_CLK_MOD_NUM] = {
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{ MMC_CLK_400K, 0, 7 },
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{ MMC_CLK_25M, 0, 5 },
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@@ -450,6 +439,7 @@ static void sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *smc_host,
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u32 sclk_dly;
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u32 temp;
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struct sunxi_mmc_clk_dly *dly = NULL;
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+ struct clk_hw *hw = __clk_get_hw(smc_host->clk_mod);
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newrate = clk_round_rate(smc_host->clk_mod, rate);
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if (smc_host->clk_mod_rate == newrate) {
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@@ -508,7 +498,7 @@ static void sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *smc_host,
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sclk_dly--;
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}
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- sunxi_mmc_set_clk_dly(smc_host, oclk_dly, sclk_dly);
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+ clk_sunxi_mmc_phase_control(hw, sclk_dly, oclk_dly);
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sunxi_mmc_oclk_onoff(smc_host, 1);
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/* oclk_onoff sets various irq status bits, clear these */
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--
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1.8.5.5
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