mirror of https://github.com/hak5/openwrt.git
82 lines
2.4 KiB
Diff
82 lines
2.4 KiB
Diff
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From 4cca623b74420aacf656b968fde29aace96ae3db Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 7 Apr 2013 16:57:30 +0200
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Subject: [PATCH 3/3] MIPS: ralink: add cpu-feature-overrides.h for
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RT3662/3883 SoCs
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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.../asm/mach-ralink/rt3883/cpu-feature-overrides.h | 55 ++++++++++++++++++++
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arch/mips/ralink/Platform | 1 +
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2 files changed, 56 insertions(+)
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create mode 100644 arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
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@@ -0,0 +1,55 @@
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+/*
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+ * Ralink RT3662/RT3883 specific CPU feature overrides
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+ *
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+ * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * This file was derived from: include/asm-mips/cpu-features.h
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+ * Copyright (C) 2003, 2004 Ralf Baechle
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+ * Copyright (C) 2004 Maciej W. Rozycki
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ */
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+#ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
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+#define _RT3883_CPU_FEATURE_OVERRIDES_H
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+
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+#define cpu_has_tlb 1
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+#define cpu_has_4kex 1
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+#define cpu_has_3k_cache 0
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+#define cpu_has_4k_cache 1
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+#define cpu_has_tx39_cache 0
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+#define cpu_has_sb1_cache 0
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+#define cpu_has_fpu 0
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+#define cpu_has_32fpr 0
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+#define cpu_has_counter 1
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+#define cpu_has_watch 1
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+#define cpu_has_divec 1
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+
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+#define cpu_has_prefetch 1
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+#define cpu_has_ejtag 1
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+#define cpu_has_llsc 1
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+
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+#define cpu_has_mips16 1
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+#define cpu_has_mdmx 0
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+#define cpu_has_mips3d 0
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+#define cpu_has_smartmips 0
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+
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+#define cpu_has_mips32r1 1
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+#define cpu_has_mips32r2 1
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+#define cpu_has_mips64r1 0
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+#define cpu_has_mips64r2 0
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+
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+#define cpu_has_dsp 1
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+#define cpu_has_mipsmt 0
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+
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+#define cpu_has_64bits 0
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+#define cpu_has_64bit_zero_reg 0
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+#define cpu_has_64bit_gp_regs 0
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+#define cpu_has_64bit_addresses 0
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+
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+#define cpu_dcache_line_size() 32
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+#define cpu_icache_line_size() 32
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+
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+#endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */
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--- a/arch/mips/ralink/Platform
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+++ b/arch/mips/ralink/Platform
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@@ -20,6 +20,7 @@ cflags-$(CONFIG_SOC_RT305X) += -I$(srctr
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# Ralink RT3883
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#
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load-$(CONFIG_SOC_RT3883) += 0xffffffff80000000
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+cflags-$(CONFIG_SOC_RT3883) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt3883
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#
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# Ralink MT7620
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