mirror of https://github.com/hak5/openwrt.git
48 lines
1.5 KiB
Diff
48 lines
1.5 KiB
Diff
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From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001
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From: Ian Pozella <Ian.Pozella@imgtec.com>
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Date: Mon, 20 Feb 2017 10:00:52 +0000
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Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode
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The mmc block in Pistachio allows 1 to 8 data bits to be used.
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Marduk uses 4 bits allowing the upper 4 bits to be allocated
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to the Mikrobus ports. However these bits are still connected
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internally meaning the mmc block recieves signals on all data lines
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and seems the internal HW CRC checks get corrupted by this erroneous
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data.
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We cannot control what data is sent on these lines because they go
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to external ports. 1 bit mode does not exhibit the issue hence the
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safe default is to use this. If a user knows that in their use case
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they will not use the upper bits then they can set to 4 bit mode in
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order to improve performance.
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Also make sure that the upper 4 bits don't get allocated to the mmc
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driver (the default is to assign all 8 pins) so they can be allocated
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to other drivers. Allocating all 4 despite setting 1 bit mode as this
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matches what is there in hardware.
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Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
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---
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arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
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+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
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@@ -120,7 +120,7 @@
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&sdhost {
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status = "okay";
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- bus-width = <4>;
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+ bus-width = <1>;
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disable-wp;
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};
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@@ -130,6 +130,7 @@
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&pin_sdhost_data {
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drive-strength = <2>;
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+ pins = "mfio17", "mfio18", "mfio19", "mfio20";
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};
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&pwm {
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