mirror of https://github.com/hak5/openwrt.git
144 lines
4.4 KiB
Diff
144 lines
4.4 KiB
Diff
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From cddfb6f606768265f2b36658761ea9467f098f0a Mon Sep 17 00:00:00 2001
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From: mokopatches <mokopatches@openmoko.org>
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Date: Fri, 4 Apr 2008 11:33:44 +0100
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Subject: [PATCH] s3c24xx-nand-largepage.patch
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MTD: S3C24XX large page NAND support
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This adds support for using large page NAND devices
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with the S3C24XX NAND controller. This also adds the
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file Documentation/arm/Samsung-S3C24XX/NAND.txt to
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describe the differences.
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Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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---
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Documentation/arm/Samsung-S3C24XX/NAND.txt | 30 +++++++++++++++++++
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Documentation/arm/Samsung-S3C24XX/Overview.txt | 2 +
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drivers/mtd/nand/s3c2410.c | 38 ++++++++++++++++++++---
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3 files changed, 65 insertions(+), 5 deletions(-)
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create mode 100644 Documentation/arm/Samsung-S3C24XX/NAND.txt
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diff --git a/Documentation/arm/Samsung-S3C24XX/NAND.txt b/Documentation/arm/Samsung-S3C24XX/NAND.txt
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new file mode 100644
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index 0000000..bc478a3
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--- /dev/null
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+++ b/Documentation/arm/Samsung-S3C24XX/NAND.txt
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@@ -0,0 +1,30 @@
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+ S3C24XX NAND Support
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+ ====================
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+
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+Introduction
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+------------
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+
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+Small Page NAND
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+---------------
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+
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+The driver uses a 512 byte (1 page) ECC code for this setup. The
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+ECC code is not directly compatible with the default kernel ECC
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+code, so the driver enforces its own OOB layout and ECC parameters
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+
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+Large Page NAND
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+---------------
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+
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+The driver is capable of handling NAND flash with a 2KiB page
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+size, with support for hardware ECC generation and correction.
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+
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+Unlike the 512byte page mode, the driver generates ECC data for
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+each 256 byte block in an 2KiB page. This means that more than
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+one error in a page can be rectified. It also means that the
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+OOB layout remains the default kernel layout for these flashes.
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+
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+
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+Document Author
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+---------------
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+
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+Ben Dooks, Copyright 2007 Simtec Electronics
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+
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diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt
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index c31b76f..d04e1e3 100644
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--- a/Documentation/arm/Samsung-S3C24XX/Overview.txt
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+++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt
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@@ -156,6 +156,8 @@ NAND
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controller. If there are any problems the latest linux-mtd
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code can be found from http://www.linux-mtd.infradead.org/
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+ For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
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+
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Serial
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------
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diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
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index 770306c..5c1c09d 100644
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--- a/drivers/mtd/nand/s3c2410.c
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+++ b/drivers/mtd/nand/s3c2410.c
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@@ -473,7 +473,7 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
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ecc_code[1] = ecc >> 8;
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ecc_code[2] = ecc >> 16;
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- pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
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+ pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
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return 0;
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}
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@@ -662,9 +662,6 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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chip->ecc.calculate = s3c2410_nand_calculate_ecc;
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chip->ecc.correct = s3c2410_nand_correct_data;
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chip->ecc.mode = NAND_ECC_HW;
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- chip->ecc.size = 512;
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- chip->ecc.bytes = 3;
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- chip->ecc.layout = &nand_hw_eccoob;
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switch (info->cpu_type) {
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case TYPE_S3C2410:
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@@ -688,6 +685,34 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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}
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}
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+/* s3c2410_nand_update_chip
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+ *
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+ * post-probe chip update, to change any items, such as the
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+ * layout for large page nand
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+ */
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+
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+static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
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+ struct s3c2410_nand_mtd *nmtd)
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+{
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+ struct nand_chip *chip = &nmtd->chip;
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+
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+ printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
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+
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+ if (hardware_ecc) {
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+ /* change the behaviour depending on wether we are using
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+ * the large or small page nand device */
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+
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+ if (chip->page_shift > 10) {
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+ chip->ecc.size = 256;
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+ chip->ecc.bytes = 3;
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+ } else {
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+ chip->ecc.size = 512;
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+ chip->ecc.bytes = 3;
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+ chip->ecc.layout = &nand_hw_eccoob;
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+ }
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+ }
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+}
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+
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/* s3c2410_nand_probe
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*
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* called by device layer when it finds a device matching
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@@ -794,9 +819,12 @@ static int s3c24xx_nand_probe(struct platform_device *pdev,
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s3c2410_nand_init_chip(info, nmtd, sets);
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- nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
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+ nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
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+ (sets) ? sets->nr_chips : 1);
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if (nmtd->scan_res == 0) {
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+ s3c2410_nand_update_chip(info, nmtd);
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+ nand_scan_tail(&nmtd->mtd);
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s3c2410_nand_add_partition(info, nmtd, sets);
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}
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--
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1.5.6.5
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