mirror of https://github.com/hak5/openwrt-owl.git
179 lines
5.9 KiB
Diff
179 lines
5.9 KiB
Diff
From 99c659cf345640fd0f733cbcaf4583cc2c868ec0 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 29 Apr 2013 13:21:48 +0200
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Subject: [PATCH] rt2x00: rt2800lib: add RFCSR initialization for RT3883
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/net/wireless/rt2x00/rt2800.h | 1 +
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drivers/net/wireless/rt2x00/rt2800lib.c | 141 +++++++++++++++++++++++++++++++
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2 files changed, 142 insertions(+)
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--- a/drivers/net/wireless/rt2x00/rt2800.h
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+++ b/drivers/net/wireless/rt2x00/rt2800.h
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@@ -2171,6 +2171,7 @@ struct mac_iveiv_entry {
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/*
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* RFCSR 2:
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*/
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+#define RFCSR2_RESCAL_BP FIELD8(0x40)
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#define RFCSR2_RESCAL_EN FIELD8(0x80)
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/*
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--- a/drivers/net/wireless/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
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@@ -6843,6 +6843,144 @@ static void rt2800_init_rfcsr_3593(struc
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/* TODO: enable stream mode support */
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}
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+static void rt2800_init_rfcsr_3883(struct rt2x00_dev *rt2x00dev)
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+{
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+ u8 rfcsr;
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+
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+ /* TODO: get the actual ECO value from the SoC */
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+ const unsigned int eco = 5;
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+
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+ rt2800_rf_init_calibration(rt2x00dev, 2);
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+
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+ rt2800_rfcsr_write(rt2x00dev, 0, 0xe0);
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+ rt2800_rfcsr_write(rt2x00dev, 1, 0x03);
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+ rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
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+ rt2800_rfcsr_write(rt2x00dev, 3, 0x20);
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+ rt2800_rfcsr_write(rt2x00dev, 4, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 5, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 6, 0x40);
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+ rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 8, 0x5b);
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+ rt2800_rfcsr_write(rt2x00dev, 9, 0x08);
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+ rt2800_rfcsr_write(rt2x00dev, 10, 0xd3);
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+ rt2800_rfcsr_write(rt2x00dev, 11, 0x48);
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+ rt2800_rfcsr_write(rt2x00dev, 12, 0x1a);
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+ rt2800_rfcsr_write(rt2x00dev, 13, 0x12);
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+ rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
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+
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+ /* RFCSR 17 will be initialized later based on the
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+ * frequency offset stored in the EEPROM
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+ */
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+
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+ rt2800_rfcsr_write(rt2x00dev, 18, 0x40);
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+ rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
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+ rt2800_rfcsr_write(rt2x00dev, 23, 0xc0);
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+ rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 29, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
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+ rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
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+ rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
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+ rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 34, 0x20);
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+ rt2800_rfcsr_write(rt2x00dev, 35, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 37, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 38, 0x86);
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+ rt2800_rfcsr_write(rt2x00dev, 39, 0x23);
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+ rt2800_rfcsr_write(rt2x00dev, 40, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 41, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 42, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 44, 0x93);
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+ rt2800_rfcsr_write(rt2x00dev, 45, 0xbb);
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+ rt2800_rfcsr_write(rt2x00dev, 46, 0x60);
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+ rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 49, 0x8e);
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+ rt2800_rfcsr_write(rt2x00dev, 50, 0x86);
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+ rt2800_rfcsr_write(rt2x00dev, 51, 0x51);
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+ rt2800_rfcsr_write(rt2x00dev, 52, 0x05);
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+ rt2800_rfcsr_write(rt2x00dev, 53, 0x76);
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+ rt2800_rfcsr_write(rt2x00dev, 54, 0x76);
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+ rt2800_rfcsr_write(rt2x00dev, 55, 0x76);
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+ rt2800_rfcsr_write(rt2x00dev, 56, 0xdb);
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+ rt2800_rfcsr_write(rt2x00dev, 57, 0x3e);
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+ rt2800_rfcsr_write(rt2x00dev, 58, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
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+ rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
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+
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+ /* TODO: rx filter calibration? */
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+
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+ rt2800_bbp_write(rt2x00dev, 137, 0x0f);
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+
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+ rt2800_bbp_write(rt2x00dev, 163, 0x9d);
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+
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+ rt2800_bbp_write(rt2x00dev, 105, 0x05);
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+
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+ rt2800_bbp_write(rt2x00dev, 179, 0x02);
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+ rt2800_bbp_write(rt2x00dev, 180, 0x00);
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+ rt2800_bbp_write(rt2x00dev, 182, 0x40);
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+ rt2800_bbp_write(rt2x00dev, 180, 0x01);
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+ rt2800_bbp_write(rt2x00dev, 182, 0x9c);
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+
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+ rt2800_bbp_write(rt2x00dev, 179, 0x00);
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+
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+ rt2800_bbp_write(rt2x00dev, 142, 0x04);
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+ rt2800_bbp_write(rt2x00dev, 143, 0x3b);
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+ rt2800_bbp_write(rt2x00dev, 142, 0x06);
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+ rt2800_bbp_write(rt2x00dev, 143, 0xa0);
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+ rt2800_bbp_write(rt2x00dev, 142, 0x07);
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+ rt2800_bbp_write(rt2x00dev, 143, 0xa1);
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+ rt2800_bbp_write(rt2x00dev, 142, 0x08);
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+ rt2800_bbp_write(rt2x00dev, 143, 0xa2);
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+ rt2800_bbp_write(rt2x00dev, 148, 0xc8);
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+
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+ if (eco == 5) {
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+ rt2800_rfcsr_write(rt2x00dev, 32, 0xd8);
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+ rt2800_rfcsr_write(rt2x00dev, 33, 0x32);
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+ }
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+
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+ rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_BP, 0);
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+ rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
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+ rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
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+ msleep(1);
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+ rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 0);
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+ rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1);
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+ rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
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+ rfcsr |= 0xc0;
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+ rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
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+ rfcsr |= 0x20;
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+ rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 46, &rfcsr);
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+ rfcsr |= 0x20;
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+ rt2800_rfcsr_write(rt2x00dev, 46, rfcsr);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 20, &rfcsr);
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+ rfcsr &= ~0xee;
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+ rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
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+}
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+
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static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)
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{
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rt2800_rf_init_calibration(rt2x00dev, 2);
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@@ -7074,6 +7212,9 @@ static void rt2800_init_rfcsr(struct rt2
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case RT3390:
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rt2800_init_rfcsr_3390(rt2x00dev);
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break;
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+ case RT3883:
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+ rt2800_init_rfcsr_3883(rt2x00dev);
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+ break;
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case RT3572:
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rt2800_init_rfcsr_3572(rt2x00dev);
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break;
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