mirror of https://github.com/hak5/openwrt-owl.git
221 lines
6.8 KiB
Diff
221 lines
6.8 KiB
Diff
From 93f99afbc534e00d72d58336061823055ee820f1 Mon Sep 17 00:00:00 2001
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From: Andy Gross <andy.gross@linaro.org>
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Date: Tue, 12 Apr 2016 09:11:47 -0500
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Subject: [PATCH] spi: qup: Make sure mode is only determined once
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This patch calculates the mode once. All decisions on the current
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transaction
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is made using the mode instead of use_dma
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Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Change-Id: If3cdd924355e037d77dc8201a72895fac0461aa5
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---
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drivers/spi/spi-qup.c | 96 +++++++++++++++++++--------------------------------
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1 file changed, 36 insertions(+), 60 deletions(-)
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--- a/drivers/spi/spi-qup.c
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+++ b/drivers/spi/spi-qup.c
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@@ -150,13 +150,20 @@ struct spi_qup {
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int rx_bytes;
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int qup_v1;
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- int use_dma;
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+ int mode;
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struct dma_slave_config rx_conf;
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struct dma_slave_config tx_conf;
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- int mode;
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};
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+static inline bool spi_qup_is_dma_xfer(int mode)
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+{
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+ if (mode == QUP_IO_M_MODE_DMOV || mode == QUP_IO_M_MODE_BAM)
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+ return true;
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+
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+ return false;
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+}
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+
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static inline bool spi_qup_is_valid_state(struct spi_qup *controller)
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{
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u32 opstate = readl_relaxed(controller->base + QUP_STATE);
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@@ -427,7 +434,7 @@ static irqreturn_t spi_qup_qup_irq(int i
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error = -EIO;
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}
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- if (!controller->use_dma) {
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+ if (!spi_qup_is_dma_xfer(controller->mode)) {
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if (opflags & QUP_OP_IN_SERVICE_FLAG)
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spi_qup_fifo_read(controller, xfer);
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@@ -446,43 +453,11 @@ static irqreturn_t spi_qup_qup_irq(int i
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return IRQ_HANDLED;
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}
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-static u32
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-spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer)
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-{
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- struct spi_qup *qup = spi_master_get_devdata(master);
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- u32 mode;
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- size_t dma_align = dma_get_cache_alignment();
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-
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- qup->w_size = 4;
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-
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- if (xfer->bits_per_word <= 8)
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- qup->w_size = 1;
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- else if (xfer->bits_per_word <= 16)
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- qup->w_size = 2;
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-
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- qup->n_words = xfer->len / qup->w_size;
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-
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- if (!IS_ERR_OR_NULL(master->dma_rx) &&
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- IS_ALIGNED((size_t)xfer->tx_buf, dma_align) &&
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- IS_ALIGNED((size_t)xfer->rx_buf, dma_align) &&
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- !is_vmalloc_addr(xfer->tx_buf) &&
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- !is_vmalloc_addr(xfer->rx_buf) &&
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- (xfer->len > 3*qup->in_blk_sz))
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- qup->use_dma = 1;
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-
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- if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
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- mode = QUP_IO_M_MODE_FIFO;
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- else
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- mode = QUP_IO_M_MODE_BLOCK;
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-
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- return mode;
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-}
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-
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/* set clock freq ... bits per word */
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static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
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{
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struct spi_qup *controller = spi_master_get_devdata(spi->master);
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- u32 config, iomode, mode, control;
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+ u32 config, iomode, control;
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int ret, n_words;
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if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) {
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@@ -503,24 +478,22 @@ static int spi_qup_io_config(struct spi_
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return -EIO;
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}
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- controller->mode = mode = spi_qup_get_mode(spi->master, xfer);
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+ controller->w_size = DIV_ROUND_UP(xfer->bits_per_word, 8);
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+ controller->n_words = xfer->len / controller->w_size;
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n_words = controller->n_words;
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- if (mode == QUP_IO_M_MODE_FIFO) {
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+ if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
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+ controller->mode = QUP_IO_M_MODE_FIFO;
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writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
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writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
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/* must be zero for FIFO */
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writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT);
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writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
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controller->use_dma = 0;
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- } else if (!controller->use_dma) {
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- writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
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- writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
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- /* must be zero for BLOCK and BAM */
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- writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
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- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
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- } else {
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- mode = QUP_IO_M_MODE_BAM;
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+ } else if (spi->master->can_dma &&
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+ spi->master->can_dma(spi->master, spi, xfer) &&
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+ spi->master->cur_msg_mapped) {
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+ controller->mode = QUP_IO_M_MODE_BAM;
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writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
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writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
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@@ -541,19 +514,26 @@ static int spi_qup_io_config(struct spi_
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writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
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}
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+ } else {
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+ controller->mode = QUP_IO_M_MODE_BLOCK;
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+ writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
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+ writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
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+ /* must be zero for BLOCK and BAM */
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+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
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+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
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}
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iomode = readl_relaxed(controller->base + QUP_IO_M_MODES);
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/* Set input and output transfer mode */
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iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK);
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- if (!controller->use_dma)
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+ if (!spi_qup_is_dma_xfer(controller->mode))
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iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN);
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else
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iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN;
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- iomode |= (mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT);
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- iomode |= (mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT);
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+ iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT);
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+ iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT);
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writel_relaxed(iomode, controller->base + QUP_IO_M_MODES);
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@@ -594,7 +574,7 @@ static int spi_qup_io_config(struct spi_
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config |= xfer->bits_per_word - 1;
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config |= QUP_CONFIG_SPI_MODE;
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- if (controller->use_dma) {
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+ if (spi_qup_is_dma_xfer(controller->mode)) {
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if (!xfer->tx_buf)
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config |= QUP_CONFIG_NO_OUTPUT;
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if (!xfer->rx_buf)
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@@ -612,7 +592,7 @@ static int spi_qup_io_config(struct spi_
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* status change in BAM mode
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*/
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- if (mode == QUP_IO_M_MODE_BAM)
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+ if (spi_qup_is_dma_xfer(controller->mode))
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mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG;
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writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK);
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@@ -646,7 +626,7 @@ static int spi_qup_transfer_one(struct s
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controller->tx_bytes = 0;
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spin_unlock_irqrestore(&controller->lock, flags);
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- if (controller->use_dma)
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+ if (spi_qup_is_dma_xfer(controller->mode))
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ret = spi_qup_do_dma(master, xfer);
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else
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ret = spi_qup_do_pio(master, xfer);
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@@ -670,7 +650,7 @@ exit:
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ret = controller->error;
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spin_unlock_irqrestore(&controller->lock, flags);
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- if (ret && controller->use_dma)
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+ if (ret && spi_qup_is_dma_xfer(controller->mode))
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spi_qup_dma_terminate(master, xfer);
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return ret;
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@@ -681,9 +661,7 @@ static bool spi_qup_can_dma(struct spi_m
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{
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struct spi_qup *qup = spi_master_get_devdata(master);
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size_t dma_align = dma_get_cache_alignment();
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- u32 mode;
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-
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- qup->use_dma = 0;
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+ int n_words;
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if (xfer->rx_buf && (xfer->len % qup->in_blk_sz ||
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IS_ERR_OR_NULL(master->dma_rx) ||
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@@ -695,12 +673,10 @@ static bool spi_qup_can_dma(struct spi_m
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!IS_ALIGNED((size_t)xfer->tx_buf, dma_align)))
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return false;
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- mode = spi_qup_get_mode(master, xfer);
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- if (mode == QUP_IO_M_MODE_FIFO)
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+ n_words = xfer->len / DIV_ROUND_UP(xfer->bits_per_word, 8);
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+ if (n_words <= (qup->in_fifo_sz / sizeof(u32)))
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return false;
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- qup->use_dma = 1;
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-
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return true;
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}
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