mirror of https://github.com/hak5/openwrt-owl.git
500 lines
12 KiB
Diff
500 lines
12 KiB
Diff
From b84d49247eb062672a56ce15f1c08f792099de97 Mon Sep 17 00:00:00 2001
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From: arokux <arokux@gmail.com>
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Date: Wed, 18 Sep 2013 21:45:03 +0200
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Subject: [PATCH] ARM: sunxi: usb: Add Allwinner sunXi EHCI driver
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---
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drivers/usb/host/Kconfig | 9 +
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drivers/usb/host/Makefile | 1 +
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drivers/usb/host/ehci-sunxi.c | 446 ++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 456 insertions(+)
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create mode 100644 drivers/usb/host/ehci-sunxi.c
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diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
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index b3f20d7..ecc2745 100644
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -274,6 +274,15 @@ config USB_OCTEON_EHCI
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USB 2.0 device support. All CN6XXX based chips with USB are
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supported.
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+config USB_SUNXI_EHCI
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+ tristate "Allwinner sunXi EHCI support"
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+ depends on ARCH_SUNXI
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+ default n
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+ help
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+ Enable support for the Allwinner sunXi on-chip EHCI
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+ controller. It is needed for high-speed (480Mbit/sec)
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+ USB 2.0 device support.
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+
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endif # USB_EHCI_HCD
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config USB_OXU210HP_HCD
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diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
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index 50b0041..d2e2c8c 100644
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--- a/drivers/usb/host/Makefile
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+++ b/drivers/usb/host/Makefile
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@@ -38,6 +38,7 @@ obj-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
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obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
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obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
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obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
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+obj-$(CONFIG_USB_SUNXI_EHCI) += ehci-sunxi.o
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obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
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obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
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diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
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new file mode 100644
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index 0000000..e7e15cc
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--- /dev/null
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+++ b/drivers/usb/host/ehci-sunxi.c
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@@ -0,0 +1,446 @@
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+/*
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+ * Copyright (C) 2013 Roman Byshko
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+ *
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+ * Roman Byshko <rbyshko@gmail.com>
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+ *
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+ * Based on code from
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+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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+ *
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+ * This file is licensed under the terms of the GNU General Public
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+ * License version 2. This program is licensed "as is" without any
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+ * warranty of any kind, whether express or implied.
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+ */
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+
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+#include <linux/bitops.h>
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+#include <linux/clk.h>
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+#include <linux/dma-mapping.h>
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+#include <linux/io.h>
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+#include <linux/irq.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/platform_device.h>
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+#include <linux/regulator/consumer.h>
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+#include <linux/reset.h>
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+#include <linux/usb.h>
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+#include <linux/usb/hcd.h>
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+
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+#include "ehci.h"
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+
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+#define DRV_DESC "Allwinner sunXi EHCI driver"
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+#define DRV_NAME "sunxi-ehci"
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+
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+#define SUNXI_USB_PASSBY_EN 1
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+
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+#define SUNXI_EHCI_AHB_ICHR8_EN BIT(10)
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+#define SUNXI_EHCI_AHB_INCR4_BURST_EN BIT(9)
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+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN BIT(8)
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+#define SUNXI_EHCI_ULPI_BYPASS_EN BIT(0)
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+
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+struct sunxi_ehci_hcd {
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+ struct clk *phy_clk;
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+ struct clk *ahb_ehci_clk;
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+ struct reset_control *reset;
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+ struct regulator *vbus_reg;
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+ void __iomem *csr;
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+ void __iomem *pmuirq;
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+ int irq;
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+ int id;
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+};
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+
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+
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+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci,u32 addr, u32 data, u32 len)
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+{
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+ u32 j = 0;
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+ u32 temp = 0;
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+ u32 usbc_bit = 0;
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+ void __iomem *dest = sunxi_ehci->csr;
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+
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+ usbc_bit = BIT(sunxi_ehci->id << 1);
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+
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+ for (j = 0; j < len; j++) {
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+ temp = readl(dest);
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+
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+ /* clear the address portion */
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+ temp &= ~(0xff << 8);
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+
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+ /* set the address */
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+ temp |= ((addr + j) << 8);
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+ writel(temp, dest);
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+
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+ /* set the data bit and clear usbc bit*/
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+ temp = readb(dest);
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+ if (data & 0x1)
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+ temp |= BIT(7);
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+ else
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+ temp &= ~BIT(7);
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+ temp &= ~usbc_bit;
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+ writeb(temp, dest);
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+
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+ /* flip usbc_bit */
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+ __set_bit(usbc_bit, dest);
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+ __clear_bit(usbc_bit, dest);
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+
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+ data >>= 1;
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+ }
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+}
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+
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+/* FIXME: should this function be protected by a lock?
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+ * ehci1 and ehci0 could call it concurrently with same csr.
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+ */
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+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
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+{
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+ /* The following comments are machine
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+ * translated from Chinese, you have been warned!
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+ */
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+
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+ /* adjust PHY's magnitude and rate */
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+ usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
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+
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+ /* threshold adjustment disconnect */
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+ usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
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+
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+ return;
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+}
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+
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+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
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+{
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+ unsigned long reg_value = 0;
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+ unsigned long bits = 0;
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+ static DEFINE_SPINLOCK(lock);
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+ unsigned long flags = 0;
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+ void __iomem *addr = sunxi_ehci->pmuirq;
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+
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+ bits = SUNXI_EHCI_AHB_ICHR8_EN |
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+ SUNXI_EHCI_AHB_INCR4_BURST_EN |
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+ SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
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+ SUNXI_EHCI_ULPI_BYPASS_EN;
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+
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+ spin_lock_irqsave(&lock, flags);
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+
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+ reg_value = readl(addr);
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+
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+ if (enable)
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+ reg_value |= bits;
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+ else
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+ reg_value &= ~bits;
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+
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+ writel(reg_value, addr);
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+
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+ spin_unlock_irqrestore(&lock, flags);
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+
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+ return;
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+}
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+
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+static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci)
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+{
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+ regulator_disable(sunxi_ehci->vbus_reg);
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+
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+ sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN);
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+
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+ clk_disable_unprepare(sunxi_ehci->ahb_ehci_clk);
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+ clk_disable_unprepare(sunxi_ehci->phy_clk);
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+
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+ reset_control_assert(sunxi_ehci->reset);
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+}
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+
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+static int sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
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+{
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+ int ret;
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+
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+ ret = clk_prepare_enable(sunxi_ehci->phy_clk);
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+ if (ret)
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+ return ret;
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+
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+ ret = reset_control_deassert(sunxi_ehci->reset);
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+ if (ret)
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+ goto fail1;
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+
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+ ret = clk_prepare_enable(sunxi_ehci->ahb_ehci_clk);
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+ if (ret)
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+ goto fail2;
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+
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+ sunxi_usb_phy_init(sunxi_ehci);
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+
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+ sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN);
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+
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+ ret = regulator_enable(sunxi_ehci->vbus_reg);
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+ if (ret)
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+ goto fail3;
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+
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+ return 0;
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+
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+fail3:
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+ clk_disable_unprepare(sunxi_ehci->ahb_ehci_clk);
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+fail2:
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+ reset_control_assert(sunxi_ehci->reset);
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+fail1:
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+ clk_disable_unprepare(sunxi_ehci->phy_clk);
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+
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+ return ret;
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+}
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+
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+#ifdef CONFIG_PM
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+static int sunxi_ehci_suspend(struct device *dev)
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+{
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+ struct sunxi_ehci_hcd *sunxi_ehci = NULL;
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+ struct usb_hcd *hcd = dev_get_drvdata(dev);
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+ int ret;
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+
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+ bool do_wakeup = device_may_wakeup(dev);
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+
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+ ret = ehci_suspend(hcd, do_wakeup);
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+
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+ sunxi_ehci = (struct sunxi_ehci_hcd *)hcd_to_ehci(hcd)->priv;
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+
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+ sunxi_ehci_disable(sunxi_ehci);
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+
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+ return ret;
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+}
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+
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+static int sunxi_ehci_resume(struct device *dev)
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+{
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+ struct sunxi_ehci_hcd *sunxi_ehci = NULL;
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+ struct usb_hcd *hcd = dev_get_drvdata(dev);
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+ int ret;
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+
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+ sunxi_ehci = (struct sunxi_ehci_hcd *)hcd_to_ehci(hcd)->priv;
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+
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+ ret = sunxi_ehci_enable(sunxi_ehci);
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+ if (ret)
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+ return ret;
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+
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+ return ehci_resume(hcd, false);
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+}
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+
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+
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+static const struct dev_pm_ops sunxi_ehci_pmops = {
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+ .suspend = sunxi_ehci_suspend,
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+ .resume = sunxi_ehci_resume,
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+};
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+
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+#define SUNXI_EHCI_PMOPS (&sunxi_ehci_pmops)
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+#else /* !CONFIG_PM */
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+#define SUNXI_EHCI_PMOPS NULL
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+#endif /* CONFIG_PM */
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+
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+static const struct ehci_driver_overrides sunxi_overrides __initconst = {
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+ .reset = NULL,
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+ .extra_priv_size = sizeof(struct sunxi_ehci_hcd),
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+};
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+
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+/* FIXME: Should there be two instances of hc_driver,
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+ * or one is enough to handle two EHCI controllers? */
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+static struct hc_driver __read_mostly sunxi_ehci_hc_driver;
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+
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+static int sunxi_ehci_init(struct platform_device *pdev, struct usb_hcd *hcd,
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+ struct sunxi_ehci_hcd *sunxi_ehci)
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+{
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+ void __iomem *ehci_regs = NULL;
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+ struct resource *res = NULL;
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+
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+ sunxi_ehci->vbus_reg = devm_regulator_get(&pdev->dev, "vbus");
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+ if (IS_ERR(sunxi_ehci->vbus_reg)) {
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+ if (PTR_ERR(sunxi_ehci->vbus_reg) == -EPROBE_DEFER)
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+ return -EPROBE_DEFER;
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+
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+ dev_info(&pdev->dev, "no USB VBUS power supply found\n");
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+ }
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+
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+ sunxi_ehci->id = of_alias_get_id(pdev->dev.of_node, "ehci");
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+ if (sunxi_ehci->id < 0)
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+ return sunxi_ehci->id;
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+
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+ /* FIXME: should res be freed on some failure? */
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev, "failed to get I/O memory\n");
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+ return -ENXIO;
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+ }
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+ ehci_regs = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(ehci_regs))
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+ return PTR_ERR(ehci_regs);
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+
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+ hcd->rsrc_start = res->start;
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+ hcd->rsrc_len = resource_size(res);
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+ hcd->regs = ehci_regs;
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+ hcd_to_ehci(hcd)->caps = ehci_regs;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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+ if (!res) {
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+ dev_err(&pdev->dev, "failed to get I/O memory\n");
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+ return -ENXIO;
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+ }
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+ sunxi_ehci->pmuirq = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(sunxi_ehci->pmuirq))
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+ return PTR_ERR(sunxi_ehci->pmuirq);
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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+ if (!res) {
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+ dev_err(&pdev->dev, "failed to get I/O memory\n");
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+ return -ENXIO;
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+ }
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+
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+ /* FIXME: this one byte needs to be shared between both EHCIs,
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+ * that is why ioremap instead of devm_ioremap_resource,
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+ * memory is not unmaped back for now.
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+ */
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+ sunxi_ehci->csr = ioremap(res->start, resource_size(res));
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+ if (IS_ERR(sunxi_ehci->csr)) {
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+ dev_err(&pdev->dev, "failed to remap memory\n");
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+ return PTR_ERR(sunxi_ehci->csr);
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+ }
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+
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+ sunxi_ehci->irq = platform_get_irq(pdev, 0);
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+ if (!sunxi_ehci->irq) {
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+ dev_err(&pdev->dev, "failed to get IRQ\n");
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+ return -ENODEV;
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+ }
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+
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+ sunxi_ehci->phy_clk = devm_clk_get(&pdev->dev, "usb_phy");
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+ if (IS_ERR(sunxi_ehci->phy_clk)) {
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+ dev_err(&pdev->dev, "failed to get usb_phy clock\n");
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+ return PTR_ERR(sunxi_ehci->phy_clk);
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+ }
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+ sunxi_ehci->ahb_ehci_clk = devm_clk_get(&pdev->dev, "ahb_ehci");
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+ if (IS_ERR(sunxi_ehci->ahb_ehci_clk)) {
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+ dev_err(&pdev->dev, "failed to get ahb_ehci clock\n");
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+ return PTR_ERR(sunxi_ehci->ahb_ehci_clk);
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+ }
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+
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+ sunxi_ehci->reset = reset_control_get(&pdev->dev, "ehci_reset");
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+ if (IS_ERR(sunxi_ehci->reset))
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+ {
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+ dev_err(&pdev->dev, "failed to get ehci_reset reset line\n");
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+ return PTR_ERR(sunxi_ehci->reset);
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+ }
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+
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+ return 0;
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+}
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+
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+static int sunxi_ehci_probe(struct platform_device *pdev)
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+{
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+ struct sunxi_ehci_hcd *sunxi_ehci = NULL;
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+ struct usb_hcd *hcd = NULL;
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+ int ret;
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+
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+ if (pdev->num_resources != 4) {
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+ dev_err(&pdev->dev, "invalid number of resources: %i\n",
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+ pdev->num_resources);
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+ return -ENODEV;
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+ }
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+
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+ if (pdev->resource[0].flags != IORESOURCE_MEM
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+ || pdev->resource[1].flags != IORESOURCE_MEM
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+ || pdev->resource[2].flags != IORESOURCE_MEM
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+ || pdev->resource[3].flags != IORESOURCE_IRQ) {
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+ dev_err(&pdev->dev, "invalid resource type\n");
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+ return -ENODEV;
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+ }
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+
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+ if (!pdev->dev.dma_mask)
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+ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
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+ if (!pdev->dev.coherent_dma_mask)
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+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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+
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+ hcd = usb_create_hcd(&sunxi_ehci_hc_driver, &pdev->dev,
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+ dev_name(&pdev->dev));
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+ if (!hcd) {
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+ dev_err(&pdev->dev, "unable to create HCD\n");
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+ return -ENOMEM;
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+ }
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+
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+ platform_set_drvdata(pdev, hcd);
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+
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+ sunxi_ehci = (struct sunxi_ehci_hcd *)hcd_to_ehci(hcd)->priv;
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+ ret = sunxi_ehci_init(pdev, hcd, sunxi_ehci);
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+ if (ret)
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+ goto fail1;
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+
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+ ret = sunxi_ehci_enable(sunxi_ehci);
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+ if (ret)
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+ goto fail1;
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+
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+ ret = usb_add_hcd(hcd, sunxi_ehci->irq, IRQF_SHARED | IRQF_DISABLED);
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+ if (ret) {
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+ dev_err(&pdev->dev, "failed to add USB HCD\n");
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+ goto fail2;
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+ }
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+
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+ return 0;
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+
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+fail2:
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+ sunxi_ehci_disable(sunxi_ehci);
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+
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+fail1:
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+ usb_put_hcd(hcd);
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+ return ret;
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+}
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+
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+static int sunxi_ehci_remove(struct platform_device *pdev)
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+{
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+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
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+ struct sunxi_ehci_hcd *sunxi_ehci = NULL;
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+
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+ sunxi_ehci = (struct sunxi_ehci_hcd *)hcd_to_ehci(hcd)->priv;
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+
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+ usb_remove_hcd(hcd);
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+
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+ sunxi_ehci_disable(sunxi_ehci);
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+
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+ usb_put_hcd(hcd);
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+
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+ return 0;
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+}
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+
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+static void sunxi_ehci_shutdown(struct platform_device *pdev)
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+{
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+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
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+ struct sunxi_ehci_hcd *sunxi_ehci = NULL;
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+
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+ sunxi_ehci = (struct sunxi_ehci_hcd *)hcd_to_ehci(hcd)->priv;
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+
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+ usb_hcd_platform_shutdown(pdev);
|
|
+
|
|
+ sunxi_ehci_disable(sunxi_ehci);
|
|
+}
|
|
+
|
|
+static const struct of_device_id ehci_of_match[] = {
|
|
+ {.compatible = "allwinner,sunxi-ehci"},
|
|
+ {},
|
|
+};
|
|
+
|
|
+static struct platform_driver ehci_sunxi_driver = {
|
|
+ .driver = {
|
|
+ .of_match_table = ehci_of_match,
|
|
+ .name = DRV_NAME,
|
|
+ .pm = SUNXI_EHCI_PMOPS,
|
|
+ },
|
|
+ .probe = sunxi_ehci_probe,
|
|
+ .remove = sunxi_ehci_remove,
|
|
+ .shutdown = sunxi_ehci_shutdown,
|
|
+};
|
|
+
|
|
+static int __init sunxi_ehci_init_module(void)
|
|
+{
|
|
+ if (usb_disabled())
|
|
+ return -ENODEV;
|
|
+
|
|
+ pr_info(DRV_NAME ": " DRV_DESC "\n");
|
|
+
|
|
+ ehci_init_driver(&sunxi_ehci_hc_driver, &sunxi_overrides);
|
|
+
|
|
+ return platform_driver_register(&ehci_sunxi_driver);
|
|
+}
|
|
+module_init(sunxi_ehci_init_module);
|
|
+
|
|
+static void __exit sunxi_ehci_exit_module(void)
|
|
+{
|
|
+ platform_driver_unregister(&ehci_sunxi_driver);
|
|
+}
|
|
+module_exit(sunxi_ehci_exit_module);
|
|
+
|
|
+MODULE_DESCRIPTION(DRIVER_DESC);
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_ALIAS("platform:" DRV_NAME);
|
|
+MODULE_DEVICE_TABLE(of, ehci_of_match);
|
|
+MODULE_AUTHOR("Roman Byshko <rbyshko@gmail.com>");
|
|
--
|
|
1.8.4
|
|
|