mirror of https://github.com/hak5/openwrt-owl.git
323 lines
9.5 KiB
Diff
323 lines
9.5 KiB
Diff
From 0e701e28611fc08558406accadae40be36fe5289 Mon Sep 17 00:00:00 2001
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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Date: Wed, 29 May 2013 09:32:48 +0000
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Subject: [PATCH 25/29] net: mv643xx_eth: add DT parsing support
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This adds device tree parsing support for the shared driver of mv643xx_eth.
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As the bindings are slightly different from current PPC bindings new binding
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documentation is also added. Following PPC-style device setup, the shared
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driver now also adds port platform_devices and sets up port platform_data.
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Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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.../devicetree/bindings/net/marvell-orion-net.txt | 85 ++++++++++++
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drivers/net/ethernet/marvell/mv643xx_eth.c | 153 ++++++++++++++++++++-
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2 files changed, 234 insertions(+), 4 deletions(-)
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create mode 100644 Documentation/devicetree/bindings/net/marvell-orion-net.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/net/marvell-orion-net.txt
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@@ -0,0 +1,85 @@
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+Marvell Orion/Discovery ethernet controller
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+=============================================
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+
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+The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs
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+(Kirkwood, Dove, Orion5x, and Discovery Innovation) and as part of Marvell
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+Discovery system controller chips (mv64[345]60).
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+
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+The Discovery ethernet controller is described with two levels of nodes. The
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+first level describes the ethernet controller itself and the second level
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+describes up to 3 ethernet port nodes within that controller. The reason for
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+the multiple levels is that the port registers are interleaved within a single
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+set of controller registers. Each port node describes port-specific properties.
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+
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+Note: The above separation is only true for Discovery system controllers.
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+For Orion SoCs we stick to the separation, although there each controller has
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+only one port associated. Multiple ports are implemented as multiple single-port
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+controllers. As Kirkwood has some issues with proper initialization after reset,
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+an extra compatible string is added for it.
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+
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+* Ethernet controller node
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+
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+Required controller properties:
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+ - #address-cells: shall be 1.
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+ - #size-cells: shall be 0.
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+ - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
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+ - reg: address and length of the controller registers.
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+
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+Optional controller properties:
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+ - clocks: phandle reference to the controller clock.
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+ - marvell,tx-checksum-limit: max tx packet size for hardware checksum.
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+
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+* Ethernet port node
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+
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+Required port properties:
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+ - device_type: shall be "network".
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+ - compatible: shall be one of "marvell,orion-eth-port",
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+ "marvell,kirkwood-eth-port".
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+ - reg: port number relative to ethernet controller, shall be 0, 1, or 2.
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+ - interrupts: port interrupt.
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+ - local-mac-address: 6 bytes MAC address.
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+
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+Optional port properties:
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+ - marvell,tx-queue-size: size of the transmit ring buffer.
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+ - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM.
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+ - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM.
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+ - marvell,rx-queue-size: size of the receive ring buffer.
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+ - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM.
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+ - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM.
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+
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+and
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+
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+ - phy-handle: phandle reference to ethernet PHY.
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+
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+or
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+
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+ - speed: port speed if no PHY connected.
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+ - duplex: port mode if no PHY connected.
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+
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+* Node example:
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+
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+mdio-bus {
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+ ...
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+ ethphy: ethernet-phy@8 {
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+ device_type = "ethernet-phy";
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+ ...
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+ };
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+};
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+
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+eth: ethernet-controller@72000 {
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+ compatible = "marvell,orion-eth";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x72000 0x2000>;
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+ clocks = <&gate_clk 2>;
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+ marvell,tx-checksum-limit = <1600>;
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+
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+ ethernet@0 {
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+ device_type = "network";
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+ compatible = "marvell,orion-eth-port";
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+ reg = <0>;
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+ interrupts = <29>;
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+ phy-handle = <ðphy>;
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+ local-mac-address = [00 00 00 00 00 00];
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+ };
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+};
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--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
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+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
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@@ -60,6 +60,9 @@
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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+#include <linux/of.h>
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+#include <linux/of_irq.h>
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+#include <linux/of_net.h>
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#include <linux/of_mdio.h>
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static char mv643xx_eth_driver_name[] = "mv643xx_eth";
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@@ -2452,13 +2455,148 @@ static void infer_hw_params(struct mv643
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}
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}
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+#if defined(CONFIG_OF)
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+static const struct of_device_id mv643xx_eth_shared_ids[] = {
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+ { .compatible = "marvell,orion-eth", },
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+ { .compatible = "marvell,kirkwood-eth", },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(of, mv643xx_eth_shared_ids);
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+#endif
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+
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+#if defined(CONFIG_OF) && !defined(CONFIG_MV64X60)
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+#define mv643xx_eth_property(_np, _name, _v) \
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+ do { \
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+ u32 tmp; \
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+ if (!of_property_read_u32(_np, "marvell," _name, &tmp)) \
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+ _v = tmp; \
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+ } while (0)
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+
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+static struct platform_device *port_platdev[3];
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+
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+static int mv643xx_eth_shared_of_add_port(struct platform_device *pdev,
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+ struct device_node *pnp)
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+{
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+ struct platform_device *ppdev;
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+ struct mv643xx_eth_platform_data ppd;
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+ struct resource res;
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+ const char *mac_addr;
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+ int ret;
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+
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+ memset(&ppd, 0, sizeof(ppd));
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+ ppd.shared = pdev;
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+
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+ memset(&res, 0, sizeof(res));
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+ if (!of_irq_to_resource(pnp, 0, &res)) {
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+ dev_err(&pdev->dev, "missing interrupt on %s\n", pnp->name);
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+ return -EINVAL;
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+ }
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+
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+ if (of_property_read_u32(pnp, "reg", &ppd.port_number)) {
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+ dev_err(&pdev->dev, "missing reg property on %s\n", pnp->name);
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+ return -EINVAL;
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+ }
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+
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+ if (ppd.port_number >= 3) {
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+ dev_err(&pdev->dev, "invalid reg property on %s\n", pnp->name);
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+ return -EINVAL;
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+ }
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+
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+ mac_addr = of_get_mac_address(pnp);
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+ if (mac_addr)
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+ memcpy(ppd.mac_addr, mac_addr, 6);
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+
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+ mv643xx_eth_property(pnp, "tx-queue-size", ppd.tx_queue_size);
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+ mv643xx_eth_property(pnp, "tx-sram-addr", ppd.tx_sram_addr);
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+ mv643xx_eth_property(pnp, "tx-sram-size", ppd.tx_sram_size);
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+ mv643xx_eth_property(pnp, "rx-queue-size", ppd.rx_queue_size);
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+ mv643xx_eth_property(pnp, "rx-sram-addr", ppd.rx_sram_addr);
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+ mv643xx_eth_property(pnp, "rx-sram-size", ppd.rx_sram_size);
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+
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+ ppd.phy_node = of_parse_phandle(pnp, "phy-handle", 0);
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+ if (!ppd.phy_node) {
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+ ppd.phy_addr = MV643XX_ETH_PHY_NONE;
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+ of_property_read_u32(pnp, "speed", &ppd.speed);
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+ of_property_read_u32(pnp, "duplex", &ppd.duplex);
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+ }
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+
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+ ppdev = platform_device_alloc(MV643XX_ETH_NAME, ppd.port_number);
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+ if (!ppdev)
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+ return -ENOMEM;
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+ ppdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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+
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+ ret = platform_device_add_resources(ppdev, &res, 1);
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+ if (ret)
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+ goto port_err;
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+
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+ ret = platform_device_add_data(ppdev, &ppd, sizeof(ppd));
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+ if (ret)
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+ goto port_err;
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+
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+ ret = platform_device_add(ppdev);
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+ if (ret)
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+ goto port_err;
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+
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+ port_platdev[ppd.port_number] = ppdev;
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+
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+ return 0;
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+
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+port_err:
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+ platform_device_put(ppdev);
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+ return ret;
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+}
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+
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+static int mv643xx_eth_shared_of_probe(struct platform_device *pdev)
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+{
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+ struct mv643xx_eth_shared_platform_data *pd;
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+ struct device_node *pnp, *np = pdev->dev.of_node;
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+ int ret;
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+
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+ /* bail out if not registered from DT */
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+ if (!np)
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+ return 0;
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+
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+ pd = devm_kzalloc(&pdev->dev, sizeof(*pd), GFP_KERNEL);
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+ if (!pd)
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+ return -ENOMEM;
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+ pdev->dev.platform_data = pd;
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+
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+ mv643xx_eth_property(np, "tx-checksum-limit", pd->tx_csum_limit);
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+
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+ for_each_available_child_of_node(np, pnp) {
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+ ret = mv643xx_eth_shared_of_add_port(pdev, pnp);
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+ if (ret)
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+ return ret;
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+ }
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+ return 0;
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+}
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+
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+static void mv643xx_eth_shared_of_remove(void)
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+{
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+ int n;
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+
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+ for (n = 0; n < 3; n++) {
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+ platform_device_del(port_platdev[n]);
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+ port_platdev[n] = NULL;
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+ }
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+}
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+#else
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+static int mv643xx_eth_shared_of_probe(struct platform_device *pdev)
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+{
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+ return 0
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+}
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+
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+#define mv643xx_eth_shared_of_remove()
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+#endif
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+
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static int mv643xx_eth_shared_probe(struct platform_device *pdev)
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{
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static int mv643xx_eth_version_printed;
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- struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
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+ struct mv643xx_eth_shared_platform_data *pd;
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struct mv643xx_eth_shared_private *msp;
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const struct mbus_dram_target_info *dram;
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struct resource *res;
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+ int ret;
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if (!mv643xx_eth_version_printed++)
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pr_notice("MV-643xx 10/100/1000 ethernet driver version %s\n",
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@@ -2471,6 +2609,7 @@ static int mv643xx_eth_shared_probe(stru
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msp = devm_kzalloc(&pdev->dev, sizeof(*msp), GFP_KERNEL);
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if (msp == NULL)
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return -ENOMEM;
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+ platform_set_drvdata(pdev, msp);
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msp->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (msp->base == NULL)
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@@ -2487,12 +2626,15 @@ static int mv643xx_eth_shared_probe(stru
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if (dram)
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mv643xx_eth_conf_mbus_windows(msp, dram);
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+ ret = mv643xx_eth_shared_of_probe(pdev);
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+ if (ret)
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+ return ret;
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+ pd = pdev->dev.platform_data;
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+
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msp->tx_csum_limit = (pd != NULL && pd->tx_csum_limit) ?
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pd->tx_csum_limit : 9 * 1024;
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infer_hw_params(msp);
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- platform_set_drvdata(pdev, msp);
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-
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return 0;
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}
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@@ -2500,9 +2642,9 @@ static int mv643xx_eth_shared_remove(str
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{
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struct mv643xx_eth_shared_private *msp = platform_get_drvdata(pdev);
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+ mv643xx_eth_shared_of_remove();
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if (!IS_ERR(msp->clk))
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clk_disable_unprepare(msp->clk);
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-
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return 0;
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}
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@@ -2512,6 +2654,7 @@ static struct platform_driver mv643xx_et
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.driver = {
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.name = MV643XX_ETH_SHARED_NAME,
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.owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(mv643xx_eth_shared_ids),
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},
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};
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@@ -2720,6 +2863,8 @@ static int mv643xx_eth_probe(struct plat
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if (!IS_ERR(mp->clk)) {
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clk_prepare_enable(mp->clk);
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mp->t_clk = clk_get_rate(mp->clk);
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+ } else if (!IS_ERR(mp->shared->clk)) {
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+ mp->t_clk = clk_get_rate(mp->shared->clk);
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}
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set_params(mp, pd);
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