mirror of https://github.com/hak5/openwrt-owl.git
72 lines
2.1 KiB
Diff
72 lines
2.1 KiB
Diff
From: Oleksij Rempel <linux@rempel-privat.de>
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Date: Sun, 22 Mar 2015 19:29:54 +0100
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Subject: [PATCH] ath9k: ath9k_hw_loadnf: use REG_RMW
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Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/ath/ath9k/calib.c
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+++ b/drivers/net/wireless/ath/ath9k/calib.c
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@@ -238,7 +238,6 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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{
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struct ath9k_nfcal_hist *h = NULL;
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unsigned i, j;
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- int32_t val;
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u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
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struct ath_common *common = ath9k_hw_common(ah);
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s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
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@@ -246,6 +245,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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if (ah->caldata)
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h = ah->caldata->nfCalHist;
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+ ENABLE_REG_RMW_BUFFER(ah);
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for (i = 0; i < NUM_NF_READINGS; i++) {
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if (chainmask & (1 << i)) {
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s16 nfval;
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@@ -258,10 +258,8 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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else
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nfval = default_nf;
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- val = REG_READ(ah, ah->nf_regs[i]);
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- val &= 0xFFFFFE00;
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- val |= (((u32) nfval << 1) & 0x1ff);
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- REG_WRITE(ah, ah->nf_regs[i], val);
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+ REG_RMW(ah, ah->nf_regs[i],
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+ (((u32) nfval << 1) & 0x1ff), 0x1ff);
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}
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}
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@@ -274,6 +272,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
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AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
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REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
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+ REG_RMW_BUFFER_FLUSH(ah);
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/*
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* Wait for load to complete, should be fast, a few 10s of us.
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@@ -309,19 +308,17 @@ int ath9k_hw_loadnf(struct ath_hw *ah, s
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* by the median we just loaded. This will be initial (and max) value
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* of next noise floor calibration the baseband does.
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*/
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- ENABLE_REGWRITE_BUFFER(ah);
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+ ENABLE_REG_RMW_BUFFER(ah);
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for (i = 0; i < NUM_NF_READINGS; i++) {
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if (chainmask & (1 << i)) {
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if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan))
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continue;
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- val = REG_READ(ah, ah->nf_regs[i]);
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- val &= 0xFFFFFE00;
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- val |= (((u32) (-50) << 1) & 0x1ff);
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- REG_WRITE(ah, ah->nf_regs[i], val);
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+ REG_RMW(ah, ah->nf_regs[i],
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+ (((u32) (-50) << 1) & 0x1ff), 0x1ff);
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}
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}
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- REGWRITE_BUFFER_FLUSH(ah);
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+ REG_RMW_BUFFER_FLUSH(ah);
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return 0;
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}
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