mirror of https://github.com/hak5/openwrt-owl.git
381 lines
10 KiB
Diff
381 lines
10 KiB
Diff
From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 30 Nov 2014 14:54:27 +0100
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Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
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interrupt controller
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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.../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
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drivers/irqchip/Kconfig | 4 +
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drivers/irqchip/Makefile | 1 +
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drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
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include/linux/irqchip/irq-bcm6345-ext.h | 14 +
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5 files changed, 335 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
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create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
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create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
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@@ -0,0 +1,29 @@
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+Broadcom BCM6345-style external interrupt controller
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+
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+Required properties:
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+
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+- compatible: Should be "brcm,bcm6345-l2-intc".
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+- reg: Specifies the base physical addresses and size of the registers.
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+- interrupt-controller: identifies the node as an interrupt controller.
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+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
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+ source, Should be 2.
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+- interrupt-parent: Specifies the phandle to the parent interrupt controller
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+ this one is cascaded from.
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+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
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+ node, valid values depend on the type of parent interrupt controller.
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+
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+Optional properties:
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+
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+- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
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+ register. Defaults to 4.
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+
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+Example:
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+
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+ext_intc: interrupt-controller@10000018 {
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+ compatible = "brcm,bcm6345-l2-intc";
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+ interrupt-parent = <&periph_intc>;
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+ #interrupt-cells = <2>;
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+ reg = <0x10000018 0x4>;
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+ interrupt-controller;
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+ interrupts = <24>, <25>, <26>, <27>;
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+};
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--- a/drivers/irqchip/Kconfig
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+++ b/drivers/irqchip/Kconfig
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@@ -75,6 +75,10 @@ config BRCMSTB_L2_IRQ
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select GENERIC_IRQ_CHIP
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select IRQ_DOMAIN
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+config BCM6345_EXT_IRQ
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+ bool
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+ select IRQ_DOMAIN
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+
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config BCM6345_PERIPH_IRQ
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bool
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select IRQ_DOMAIN
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--- a/drivers/irqchip/Makefile
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+++ b/drivers/irqchip/Makefile
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@@ -8,6 +8,7 @@ obj-$(CONFIG_ARCH_MVEBU) += irq-armada-
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obj-$(CONFIG_ARCH_MXS) += irq-mxs.o
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obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
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obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
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+obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
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obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
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obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
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obj-$(CONFIG_METAG) += irq-metag-ext.o
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--- /dev/null
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+++ b/drivers/irqchip/irq-bcm6345-ext.c
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@@ -0,0 +1,287 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
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+ */
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+
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+#include <linux/ioport.h>
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+#include <linux/irq.h>
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+#include <linux/irqchip/chained_irq.h>
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+#include <linux/irqchip/irq-bcm6345-ext.h>
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+#include <linux/kernel.h>
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+#include <linux/of.h>
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+#include <linux/of_irq.h>
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+#include <linux/of_address.h>
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+#include <linux/slab.h>
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+#include <linux/spinlock.h>
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+
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+#include "irqchip.h"
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+
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+#ifdef CONFIG_BCM63XX
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+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
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+
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+#define VIRQ_BASE IRQ_EXTERNAL_BASE
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+#else
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+#define VIRQ_BASE 0
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+#endif
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+
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+#define MAX_IRQS 4
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+
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+#define EXTIRQ_CFG_SENSE 0
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+#define EXTIRQ_CFG_STAT 1
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+#define EXTIRQ_CFG_CLEAR 2
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+#define EXTIRQ_CFG_MASK 3
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+#define EXTIRQ_CFG_BOTHEDGE 4
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+#define EXTIRQ_CFG_LEVELSENSE 5
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+
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+struct intc_data {
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+ struct irq_chip chip;
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+ struct irq_domain *domain;
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+ raw_spinlock_t lock;
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+
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+ int parent_irq[MAX_IRQS];
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+ void __iomem *reg;
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+ int shift;
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+};
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+
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+static void bcm6345_ext_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
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+{
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+ struct intc_data *data = irq_desc_get_handler_data(desc);
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+ struct irq_chip *chip = irq_desc_get_chip(desc);
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+ unsigned int idx;
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+
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+ chained_irq_enter(chip, desc);
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+
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+ for (idx = 0; idx < MAX_IRQS; idx++) {
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+ if (data->parent_irq[idx] != irq)
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+ continue;
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+
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+ generic_handle_irq(irq_find_mapping(data->domain, idx));
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+ }
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+
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+ chained_irq_exit(chip, desc);
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+}
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+
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+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
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+{
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+ struct intc_data *priv = data->domain->host_data;
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+ u32 reg;
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+
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+ raw_spin_lock(&priv->lock);
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+ reg = __raw_readl(priv->reg);
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+ reg |= hwirq << (EXTIRQ_CFG_CLEAR * priv->shift);
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+ __raw_writel(reg, priv->reg);
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+ raw_spin_unlock(&priv->lock);
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+}
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+
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+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
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+{
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+ struct intc_data *priv = data->domain->host_data;
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+ u32 reg;
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+
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+ raw_spin_lock(&priv->lock);
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+ reg = __raw_readl(priv->reg);
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+ reg &= ~(hwirq << (EXTIRQ_CFG_MASK * priv->shift));
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+ __raw_writel(reg, priv->reg);
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+ raw_spin_unlock(&priv->lock);
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+}
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+
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+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
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+{
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+ struct intc_data *priv = data->domain->host_data;
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+ u32 reg;
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+
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+ raw_spin_lock(&priv->lock);
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+ reg = __raw_readl(priv->reg);
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+ reg |= hwirq << (EXTIRQ_CFG_MASK * priv->shift);
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+ __raw_writel(reg, priv->reg);
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+ raw_spin_unlock(&priv->lock);
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+}
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+
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+static int bcm6345_ext_intc_set_type(struct irq_data *data,
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+ unsigned int flow_type)
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+{
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+ struct intc_data *priv = data->domain->host_data;
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+ bool levelsense = 0, sense = 0, bothedge = 0;
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+ u32 reg;
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+
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+ flow_type &= IRQ_TYPE_SENSE_MASK;
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+
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+ if (flow_type == IRQ_TYPE_NONE)
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+ flow_type = IRQ_TYPE_LEVEL_LOW;
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+
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+ switch (flow_type) {
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+ case IRQ_TYPE_EDGE_BOTH:
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+ bothedge = 1;
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+ break;
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+
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+ case IRQ_TYPE_EDGE_RISING:
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+ break;
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+
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+ case IRQ_TYPE_EDGE_FALLING:
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+ sense = 1;
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+ break;
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+
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+ case IRQ_TYPE_LEVEL_HIGH:
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+ levelsense = 1;
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+ sense = 1;
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+ break;
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+
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+ case IRQ_TYPE_LEVEL_LOW:
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+ levelsense = 1;
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+ break;
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+
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+ default:
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+ pr_err("bogus flow type combination given!\n");
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+ return -EINVAL;
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+ }
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+
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+ raw_spin_lock(&priv->lock);
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+ reg = __raw_readl(priv->reg);
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+
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+ if (levelsense)
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+ reg |= hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift);
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+ else
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+ reg &= ~(hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift));
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+ if (sense)
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+ reg |= hwirq << (EXTIRQ_CFG_SENSE * priv->shift);
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+ else
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+ reg &= ~(hwirq << (EXTIRQ_CFG_SENSE * priv->shift));
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+ if (bothedge)
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+ reg |= hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift);
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+ else
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+ reg &= ~(hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift));
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+
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+ __raw_writel(reg, priv->reg);
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+ raw_spin_unlock(&priv->lock);
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+
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+ irqd_set_trigger_type(data, flow_type);
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+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
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+ __irq_set_handler_locked(data->irq, handle_level_irq);
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+ else
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+ __irq_set_handler_locked(data->irq, handle_edge_irq);
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+
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+ return 0;
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+}
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+
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+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
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+ irq_hw_number_t hw)
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+{
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+ struct intc_data *priv = d->host_data;
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+
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+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
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+
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+ return 0;
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+}
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+
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+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
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+ .xlate = irq_domain_xlate_twocell,
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+ .map = bcm6345_ext_intc_map,
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+};
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+
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+static int __init __bcm6345_ext_intc_init(struct device_node *node,
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+ int num_irqs, int *irqs,
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+ void __iomem *reg, int shift)
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+{
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+ struct intc_data *data;
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+ unsigned int i;
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+ int start = VIRQ_BASE;
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+
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+ data = kzalloc(sizeof(*data), GFP_KERNEL);
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+ if (!data)
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+ return -ENOMEM;
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+
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+ raw_spin_lock_init(&data->lock);
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+
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+ for (i = 0; i < num_irqs; i++) {
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+ data->parent_irq[i] = irqs[i];
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+
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+ irq_set_handler_data(irqs[i], data);
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+ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
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+ }
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+
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+ data->reg = reg;
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+
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+ data->chip.name = "bcm6345-ext-intc";
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+ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
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+ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
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+ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
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+ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
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+
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+ /*
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+ * If we have less than 4 irqs, this is the second controller on
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+ * bcm63xx. So increase the VIRQ start to not overlap with the first
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+ * one, but only do so if we actually use a non-zero start.
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+ *
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+ * This can be removed when bcm63xx has no legacy users anymore.
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+ */
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+ if (start && num_irqs < 4)
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+ start += 4;
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+
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+ data->domain = irq_domain_add_simple(node, num_irqs, start,
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+ &bcm6345_ext_domain_ops, data);
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+ if (!data->domain) {
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+ kfree(data);
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+ return -ENOMEM;
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+ }
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+
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+ return 0;
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+}
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+
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+void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
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+ int shift)
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+{
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+ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift);
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+}
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+
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+#ifdef CONFIG_OF
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+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
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+ struct device_node *parent)
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+{
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+ int num_irqs, ret = -EINVAL;
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+ unsigned i;
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+ void __iomem *base;
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+ int irqs[MAX_IRQS] = { 0 };
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+ u32 shift;
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+
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+ num_irqs = of_irq_count(node);
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+
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+ if (!num_irqs || num_irqs > MAX_IRQS)
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+ return -EINVAL;
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+
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+ if (of_property_read_u32(node, "brcm,field-width", &shift))
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+ shift = 4;
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+
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+ for (i = 0; i < num_irqs; i++) {
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+ irqs[i] = irq_of_parse_and_map(node, i);
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+ if (!irqs[i]) {
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+ ret = -ENOMEM;
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+ goto out_unmap;
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+ }
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+ }
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+
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+ base = of_iomap(node, 0);
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+ if (!base)
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+ goto out_unmap;
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+
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+ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift);
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+ if (!ret)
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+ return 0;
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+out_unmap:
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+ iounmap(base);
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+
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+ for (i = 0; i < num_irqs; i++)
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+ irq_dispose_mapping(irqs[i]);
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+
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+ return ret;
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+}
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+
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+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
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+ bcm6345_ext_intc_of_init);
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+#endif
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--- /dev/null
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+++ b/include/linux/irqchip/irq-bcm6345-ext.h
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@@ -0,0 +1,14 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
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+ */
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+
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+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
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+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
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+
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+void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
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+
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+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
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