mirror of https://github.com/hak5/openwrt-owl.git
68 lines
2.5 KiB
Diff
68 lines
2.5 KiB
Diff
From patchwork Wed Mar 29 09:38:21 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [net-next, v3,
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3/5] net-next: ethernet: mediatek: add CDM able to recognize the tag
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for DSA
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From: sean.wang@mediatek.com
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X-Patchwork-Id: 9651091
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Message-Id: <1490780303-18598-4-git-send-email-sean.wang@mediatek.com>
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To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
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<vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
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<robh+dt@kernel.org>, <mark.rutland@arm.com>
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Cc: devicetree@vger.kernel.org, Landen.Chao@mediatek.com, keyhaede@gmail.com,
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netdev@vger.kernel.org, sean.wang@mediatek.com,
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linux-kernel@vger.kernel.org,
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linux-mediatek@lists.infradead.org, objelf@gmail.com, davem@davemloft.net
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Date: Wed, 29 Mar 2017 17:38:21 +0800
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From: Sean Wang <sean.wang@mediatek.com>
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The patch adds the setup for allowing CDM can recognize these packets with
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carrying port-distinguishing tag. Otherwise, these tagging packets will be
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handled incorrectly by CDM. The setup is also working out for general
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untag packets as well.
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: Landen Chao <Landen.Chao@mediatek.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 ++++++
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++++
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2 files changed, 10 insertions(+)
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diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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index 9e75768..c21ed99 100644
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1846,6 +1846,12 @@ static int mtk_hw_init(struct mtk_eth *eth)
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/* GE2, Force 1000M/FD, FC ON */
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mtk_w32(eth, MAC_MCR_FIXED_LINK, MTK_MAC_MCR(1));
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+ /* Indicates CDM to parse the MTK special tag from CPU
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+ * which also is working out for untag packets.
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+ */
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+ val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
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+ mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL);
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+
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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index 99b1c8e..996024d 100644
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -70,6 +70,10 @@
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/* Frame Engine Interrupt Grouping Register */
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#define MTK_FE_INT_GRP 0x20
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+/* CDMP Ingress Control Register */
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+#define MTK_CDMQ_IG_CTRL 0x1400
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+#define MTK_CDMQ_STAG_EN BIT(0)
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+
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/* CDMP Exgress Control Register */
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#define MTK_CDMP_EG_CTRL 0x404
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