hak5
/
openwrt-owl
mirror of https://github.com/hak5/openwrt-owl.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
openwrt-owl/target/linux/mvebu/patches-4.4/138-phylink-add-flow-contro...

263 lines
8.3 KiB
Diff
Raw Blame History

From f566177aa6661e646b83526f24391a568ffd1a75 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Thu, 1 Oct 2015 20:32:07 +0100
Subject: [PATCH 726/744] phylink: add flow control support
Add flow control support, including ethtool support, to phylink. We
add support to allow ethtool to get and set the current flow control
settings, and the 802.3 specified resolution for the local and remote
link partner abilities.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
drivers/net/phy/phylink.c | 145 +++++++++++++++++++++++++++++++++++++++++-----
include/linux/phylink.h | 8 +++
2 files changed, 139 insertions(+), 14 deletions(-)
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -91,10 +91,12 @@ static int phylink_parse_fixedlink(struc
pl->link_config.an_complete = 1;
pl->link_config.speed = speed;
pl->link_config.duplex = DUPLEX_HALF;
- pl->link_config.pause = MLO_PAUSE_NONE;
if (of_property_read_bool(fixed_node, "full-duplex"))
pl->link_config.duplex = DUPLEX_FULL;
+
+ /* We treat the "pause" and "asym-pause" terminology as
+ * defining the link partner's ability. */
if (of_property_read_bool(fixed_node, "pause"))
pl->link_config.pause |= MLO_PAUSE_SYM;
if (of_property_read_bool(fixed_node, "asym-pause"))
@@ -118,7 +120,6 @@ static int phylink_parse_fixedlink(struc
pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ?
DUPLEX_FULL : DUPLEX_HALF;
pl->link_config.speed = be32_to_cpu(fixed_prop[2]);
- pl->link_config.pause = MLO_PAUSE_NONE;
if (be32_to_cpu(fixed_prop[3]))
pl->link_config.pause |= MLO_PAUSE_SYM;
if (be32_to_cpu(fixed_prop[4]))
@@ -130,16 +131,6 @@ static int phylink_parse_fixedlink(struc
}
if (pl->link_an_mode == MLO_AN_FIXED) {
- /* Generate the supported/advertising masks */
- if (pl->link_config.pause & MLO_PAUSE_SYM) {
- pl->link_config.supported |= SUPPORTED_Pause;
- pl->link_config.advertising |= ADVERTISED_Pause;
- }
- if (pl->link_config.pause & MLO_PAUSE_ASYM) {
- pl->link_config.supported |= SUPPORTED_Asym_Pause;
- pl->link_config.advertising |= ADVERTISED_Asym_Pause;
- }
-
if (pl->link_config.speed > SPEED_1000 &&
pl->link_config.duplex != DUPLEX_FULL)
netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n",
@@ -242,6 +233,56 @@ static void phylink_get_fixed_state(stru
state->link = !!gpiod_get_value(pl->link_gpio);
}
+/* Flow control is resolved according to our and the link partners
+ * advertisments using the following drawn from the 802.3 specs:
+ * Local device Link partner
+ * Pause AsymDir Pause AsymDir Result
+ * 1 X 1 X TX+RX
+ * 0 1 1 1 RX
+ * 1 1 0 1 TX
+ */
+static void phylink_resolve_flow(struct phylink *pl,
+ struct phylink_link_state *state)
+{
+ int new_pause = 0;
+
+ if (pl->link_config.pause & MLO_PAUSE_AN) {
+ int pause = 0;
+
+ if (pl->link_config.advertising & ADVERTISED_Pause)
+ pause |= MLO_PAUSE_SYM;
+ if (pl->link_config.advertising & ADVERTISED_Asym_Pause)
+ pause |= MLO_PAUSE_ASYM;
+
+ pause &= state->pause;
+
+ if (pause & MLO_PAUSE_SYM)
+ new_pause = MLO_PAUSE_TX | MLO_PAUSE_RX;
+ else if (pause & MLO_PAUSE_ASYM)
+ new_pause = state->pause & MLO_PAUSE_SYM ?
+ MLO_PAUSE_RX : MLO_PAUSE_TX;
+ } else {
+ new_pause = pl->link_config.pause & MLO_PAUSE_TXRX_MASK;
+ }
+
+ state->pause &= ~MLO_PAUSE_TXRX_MASK;
+ state->pause |= new_pause;
+}
+
+static const char *phylink_pause_to_str(int pause)
+{
+ switch (pause & MLO_PAUSE_TXRX_MASK) {
+ case MLO_PAUSE_TX | MLO_PAUSE_RX:
+ return "rx/tx";
+ case MLO_PAUSE_TX:
+ return "tx";
+ case MLO_PAUSE_RX:
+ return "rx";
+ default:
+ return "off";
+ }
+}
+
extern const char *phy_speed_to_str(int speed);
static void phylink_resolve(struct work_struct *w)
@@ -257,6 +298,7 @@ static void phylink_resolve(struct work_
switch (pl->link_an_mode) {
case MLO_AN_PHY:
link_state = pl->phy_state;
+ phylink_resolve_flow(pl, &link_state);
break;
case MLO_AN_FIXED:
@@ -265,9 +307,12 @@ static void phylink_resolve(struct work_
case MLO_AN_SGMII:
phylink_get_mac_state(pl, &link_state);
- if (pl->phydev)
+ if (pl->phydev) {
link_state.link = link_state.link &&
pl->phy_state.link;
+ link_state.pause |= pl->phy_state.pause;
+ phylink_resolve_flow(pl, &link_state);
+ }
break;
case MLO_AN_8023Z:
@@ -297,7 +342,7 @@ static void phylink_resolve(struct work_
"Link is Up - %s/%s - flow control %s\n",
phy_speed_to_str(link_state.speed),
link_state.duplex ? "Full" : "Half",
- link_state.pause ? "rx/tx" : "off");
+ phylink_pause_to_str(link_state.pause));
}
}
mutex_unlock(&pl->state_mutex);
@@ -326,6 +371,7 @@ struct phylink *phylink_create(struct ne
pl->link_interface = iface;
pl->link_port_support = SUPPORTED_MII;
pl->link_port = PORT_MII;
+ pl->link_config.pause = MLO_PAUSE_AN;
pl->ops = ops;
__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
@@ -507,6 +553,7 @@ void phylink_start(struct phylink *pl)
* a fixed-link to start with the correct parameters, and also
* ensures that we set the appropriate advertisment for Serdes links.
*/
+ phylink_resolve_flow(pl, &pl->link_config);
phylink_mac_config(pl, &pl->link_config);
clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
@@ -701,6 +748,76 @@ int phylink_ethtool_nway_reset(struct ph
}
EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
+void phylink_ethtool_get_pauseparam(struct phylink *pl,
+ struct ethtool_pauseparam *pause)
+{
+ mutex_lock(&pl->config_mutex);
+
+ pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
+ pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
+ pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
+
+ mutex_unlock(&pl->config_mutex);
+}
+EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
+
+static int __phylink_ethtool_set_pauseparam(struct phylink *pl,
+ struct ethtool_pauseparam *pause)
+{
+ struct phylink_link_state *config = &pl->link_config;
+
+ if (!(config->supported & (SUPPORTED_Pause | SUPPORTED_Asym_Pause)))
+ return -EOPNOTSUPP;
+
+ if (!(config->supported & SUPPORTED_Asym_Pause) &&
+ !pause->autoneg && pause->rx_pause != pause->tx_pause)
+ return -EINVAL;
+
+ config->pause &= ~(MLO_PAUSE_AN | MLO_PAUSE_TXRX_MASK);
+
+ if (pause->autoneg)
+ config->pause |= MLO_PAUSE_AN;
+ if (pause->rx_pause)
+ config->pause |= MLO_PAUSE_RX;
+ if (pause->tx_pause)
+ config->pause |= MLO_PAUSE_TX;
+
+ switch (pl->link_an_mode) {
+ case MLO_AN_PHY:
+ /* Silently mark the carrier down, and then trigger a resolve */
+ netif_carrier_off(pl->netdev);
+ phylink_run_resolve(pl);
+ break;
+
+ case MLO_AN_FIXED:
+ /* Should we allow fixed links to change against the config? */
+ phylink_resolve_flow(pl, config);
+ phylink_mac_config(pl, config);
+ break;
+
+ case MLO_AN_SGMII:
+ case MLO_AN_8023Z:
+ phylink_mac_config(pl, config);
+ phylink_mac_an_restart(pl);
+ break;
+ }
+
+ return 0;
+}
+
+int phylink_ethtool_set_pauseparam(struct phylink *pl,
+ struct ethtool_pauseparam *pause)
+{
+ int ret;
+
+ mutex_lock(&pl->config_mutex);
+ ret = __phylink_ethtool_set_pauseparam(pl, pause);
+ mutex_unlock(&pl->config_mutex);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
+
/* This emulates MII registers for a fixed-mode phy operating as per the
* passed in state. "aneg" defines if we report negotiation is possible.
*
--- a/include/linux/phylink.h
+++ b/include/linux/phylink.h
@@ -13,6 +13,10 @@ enum {
MLO_PAUSE_NONE,
MLO_PAUSE_ASYM = BIT(0),
MLO_PAUSE_SYM = BIT(1),
+ MLO_PAUSE_RX = BIT(2),
+ MLO_PAUSE_TX = BIT(3),
+ MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX,
+ MLO_PAUSE_AN = BIT(4),
MLO_AN_PHY = 0,
MLO_AN_FIXED,
@@ -66,6 +70,10 @@ void phylink_stop(struct phylink *);
int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *);
int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *);
int phylink_ethtool_nway_reset(struct phylink *);
+void phylink_ethtool_get_pauseparam(struct phylink *,
+ struct ethtool_pauseparam *);
+int phylink_ethtool_set_pauseparam(struct phylink *,
+ struct ethtool_pauseparam *);
int phylink_mii_ioctl(struct phylink *, struct ifreq *, int);
void phylink_set_link_port(struct phylink *pl, u32 support, u8 port);
Reference in New Issue View Git Blame Copy Permalink