mirror of https://github.com/hak5/openwrt-owl.git
180 lines
5.2 KiB
Diff
180 lines
5.2 KiB
Diff
From a3bddfdd19c49f0bde7aa2ff496773c575763d07 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
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Date: Sat, 15 Feb 2014 14:02:01 +0100
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Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 ++++
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arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 8 ++++
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arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 23 ++++++++++
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arch/arm/boot/dts/sun7i-a20.dtsi | 61 +++++++++++++++++++++++++
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4 files changed, 100 insertions(+)
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diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
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index 07823c2..a8186f5 100644
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--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
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+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
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@@ -20,6 +20,14 @@
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compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
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soc@01c00000 {
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+ mmc0: mmc@01c0f000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc0_pins_a>;
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+ pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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+ cd-gpios = <&pio 7 1 0>; /* PH1 */
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+ status = "okay";
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+ };
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+
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ahci: sata@01c18000 {
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target-supply = <®_ahci_5v>;
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status = "okay";
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diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
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index 403bd2e..6cd7cca 100644
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diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
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index d5c6799..d4e2355 100644
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--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
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+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
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@@ -20,12 +20,35 @@
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compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
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soc@01c00000 {
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+ mmc0: mmc@01c0f000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc0_pins_a>;
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+ pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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+ cd-gpios = <&pio 7 1 0>; /* PH1 */
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+ status = "okay";
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+ };
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+
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+ mmc3: mmc@01c12000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc3_pins_a>;
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+ pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
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+ cd-gpios = <&pio 7 11 0>; /* PH11 */
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+ status = "okay";
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+ };
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+
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ahci: sata@01c18000 {
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target-supply = <®_ahci_5v>;
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status = "okay";
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};
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pinctrl@01c20800 {
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+ mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
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+ allwinner,pins = "PH11";
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+ allwinner,function = "gpio_in";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <1>;
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+ };
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+
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led_pins_olinuxino: led_pins@0 {
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allwinner,pins = "PH2";
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allwinner,function = "gpio_out";
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diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
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index cb25d3c..66bb3ef 100644
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--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
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+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
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@@ -20,6 +20,14 @@
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compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
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soc@01c00000 {
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+ mmc0: mmc@01c0f000 {
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+ pinctrl-names = "default", "default";
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+ pinctrl-0 = <&mmc0_pins_a>;
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+ pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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+ cd-gpios = <&pio 7 1 0>; /* PH1 */
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+ status = "okay";
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+ };
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+
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ahci: sata@01c18000 {
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target-supply = <®_ahci_5v>;
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status = "okay";
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diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
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index 3385994..3bc6ac5 100644
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -392,6 +392,46 @@
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#size-cells = <0>;
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};
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+ mmc0: mmc@01c0f000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c0f000 0x1000>;
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+ clocks = <&ahb_gates 8>, <&mmc0_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <0 32 4>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc1: mmc@01c10000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c10000 0x1000>;
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+ clocks = <&ahb_gates 9>, <&mmc1_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <0 33 4>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc2: mmc@01c11000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c11000 0x1000>;
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+ clocks = <&ahb_gates 10>, <&mmc2_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <0 34 4>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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+ mmc3: mmc@01c12000 {
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+ compatible = "allwinner,sun5i-a13-mmc";
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+ reg = <0x01c12000 0x1000>;
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+ clocks = <&ahb_gates 11>, <&mmc3_clk>;
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+ clock-names = "ahb", "mod";
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+ interrupts = <0 35 4>;
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+ bus-width = <4>;
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+ status = "disabled";
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+ };
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+
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ahci: sata@01c18000 {
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compatible = "allwinner,sun4i-a10-ahci";
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reg = <0x01c18000 0x1000>;
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@@ -510,6 +550,27 @@
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allwinner,drive = <3>;
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allwinner,pull = <0>;
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};
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+
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+ mmc0_pins_a: mmc0@0 {
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+ allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
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+ allwinner,function = "mmc0";
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+ allwinner,drive = <3>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
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+ allwinner,pins = "PH1";
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+ allwinner,function = "gpio_in";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <1>;
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+ };
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+
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+ mmc3_pins_a: mmc3@0 {
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+ allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
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+ allwinner,function = "mmc3";
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+ allwinner,drive = <3>;
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+ allwinner,pull = <0>;
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+ };
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};
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timer@01c20c00 {
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--
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1.8.5.5
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