mirror of https://github.com/hak5/openwrt-owl.git
275 lines
8.7 KiB
Diff
275 lines
8.7 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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@@ -2971,14 +2971,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
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return (pBase->txrxMask >> 4) & 0xf;
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case EEP_RX_MASK:
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return pBase->txrxMask & 0xf;
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- case EEP_DRIVE_STRENGTH:
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-#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
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- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
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- case EEP_INTERNAL_REGULATOR:
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- /* Bit 4 is internal regulator flag */
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- return (pBase->featureEnable & 0x10) >> 4;
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- case EEP_SWREG:
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- return le32_to_cpu(pBase->swreg);
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case EEP_PAPRD:
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return !!(pBase->featureEnable & BIT(5));
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case EEP_CHAIN_MASK_REDUCE:
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@@ -2989,8 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
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return eep->modalHeader5G.antennaGain;
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case EEP_ANTENNA_GAIN_2G:
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return eep->modalHeader2G.antennaGain;
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- case EEP_QUICK_DROP:
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- return pBase->miscConfiguration & BIT(1);
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default:
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return 0;
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}
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@@ -3503,19 +3493,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
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return 0;
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}
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-static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
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+static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
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+ bool is2ghz)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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if (is2ghz)
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- return eep->modalHeader2G.xpaBiasLvl;
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+ return &eep->modalHeader2G;
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else
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- return eep->modalHeader5G.xpaBiasLvl;
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+ return &eep->modalHeader5G;
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}
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static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
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{
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- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
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+ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
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if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
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REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
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@@ -3531,57 +3522,26 @@ static void ar9003_hw_xpa_bias_level_app
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}
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}
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-static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
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+static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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- __le16 val;
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-
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- if (is_2ghz)
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- val = eep->modalHeader2G.switchcomspdt;
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- else
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- val = eep->modalHeader5G.switchcomspdt;
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- return le16_to_cpu(val);
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+ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
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}
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static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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- __le32 val;
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-
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- if (is2ghz)
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- val = eep->modalHeader2G.antCtrlCommon;
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- else
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- val = eep->modalHeader5G.antCtrlCommon;
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- return le32_to_cpu(val);
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+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
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}
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static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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- __le32 val;
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-
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- if (is2ghz)
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- val = eep->modalHeader2G.antCtrlCommon2;
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- else
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- val = eep->modalHeader5G.antCtrlCommon2;
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- return le32_to_cpu(val);
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+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
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}
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-static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
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- int chain,
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+static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
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bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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- __le16 val = 0;
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-
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- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
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- if (is2ghz)
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- val = eep->modalHeader2G.antCtrlChain[chain];
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- else
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- val = eep->modalHeader5G.antCtrlChain[chain];
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- }
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-
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+ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
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return le16_to_cpu(val);
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}
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@@ -3691,11 +3651,12 @@ static void ar9003_hw_ant_ctrl_apply(str
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static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
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{
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+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
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int drive_strength;
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unsigned long reg;
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- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
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-
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+ drive_strength = pBase->miscConfiguration & BIT(0);
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if (!drive_strength)
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return;
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@@ -3825,11 +3786,11 @@ static bool is_pmu_set(struct ath_hw *ah
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void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
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{
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- int internal_regulator =
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- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
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+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
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u32 reg_val;
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- if (internal_regulator) {
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+ if (pBase->featureEnable & BIT(4)) {
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if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
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int reg_pmu_set;
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@@ -3873,11 +3834,11 @@ void ar9003_hw_internal_regulator_apply(
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if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
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return;
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} else if (AR_SREV_9462(ah)) {
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- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
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+ reg_val = le32_to_cpu(pBase->swreg);
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REG_WRITE(ah, AR_PHY_PMU1, reg_val);
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} else {
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/* Internal regulator is ON. Write swreg register. */
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- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
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+ reg_val = le32_to_cpu(pBase->swreg);
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REG_WRITE(ah, AR_RTC_REG_CONTROL1,
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REG_READ(ah, AR_RTC_REG_CONTROL1) &
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(~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
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@@ -3931,10 +3892,11 @@ static void ar9003_hw_apply_tuning_caps(
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static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
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+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
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+ int quick_drop;
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s32 t[3], f[3] = {5180, 5500, 5785};
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- if (!quick_drop)
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+ if (!(pBase->miscConfiguration & BIT(1)))
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return;
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if (freq < 4000)
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@@ -3948,13 +3910,11 @@ static void ar9003_hw_quick_drop_apply(s
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REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
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}
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-static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
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+static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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u32 value;
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- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
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- eep->modalHeader5G.txEndToXpaOff;
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+ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
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REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
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AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
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@@ -3962,7 +3922,7 @@ static void ar9003_hw_txend_to_xpa_off_a
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AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
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}
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-static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
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+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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u8 xpa_ctl;
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@@ -3973,23 +3933,22 @@ static void ar9003_hw_xpa_timing_control
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if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
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return;
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- if (is_2ghz) {
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- xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
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+ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
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+ if (is2ghz)
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REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
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AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
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- } else {
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- xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
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+ else
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REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
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AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
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- }
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}
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static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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- ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
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- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
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- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
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+ bool is2ghz = IS_CHAN_2GHZ(chan);
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+ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
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+ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
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+ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
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ar9003_hw_drive_strength_apply(ah);
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ar9003_hw_atten_apply(ah, chan);
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ar9003_hw_quick_drop_apply(ah, chan->channel);
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@@ -3997,7 +3956,7 @@ static void ath9k_hw_ar9300_set_board_va
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ar9003_hw_internal_regulator_apply(ah);
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if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
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ar9003_hw_apply_tuning_caps(ah);
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- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
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+ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
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}
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static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
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@@ -5133,14 +5092,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
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return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
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}
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-u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
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+u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
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{
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- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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-
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- if (is_2ghz)
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- return eep->modalHeader2G.spurChans;
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- else
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- return eep->modalHeader5G.spurChans;
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+ return ar9003_modal_header(ah, is2ghz)->spurChans;
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}
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unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
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--- a/drivers/net/wireless/ath/ath9k/eeprom.h
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+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
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@@ -241,16 +241,12 @@ enum eeprom_param {
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EEP_TEMPSENSE_SLOPE,
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EEP_TEMPSENSE_SLOPE_PAL_ON,
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EEP_PWR_TABLE_OFFSET,
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- EEP_DRIVE_STRENGTH,
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- EEP_INTERNAL_REGULATOR,
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- EEP_SWREG,
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EEP_PAPRD,
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EEP_MODAL_VER,
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EEP_ANT_DIV_CTL1,
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EEP_CHAIN_MASK_REDUCE,
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EEP_ANTENNA_GAIN_2G,
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EEP_ANTENNA_GAIN_5G,
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- EEP_QUICK_DROP
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};
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enum ar5416_rates {
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