mirror of https://github.com/hak5/openwrt-owl.git
106 lines
3.6 KiB
Diff
106 lines
3.6 KiB
Diff
From 6091a49b0b06bf838fed80498c4f5f40d0fbd447 Mon Sep 17 00:00:00 2001
|
|
From: Christian Lamparter <chunkeey@gmail.com>
|
|
Date: Sat, 19 Nov 2016 01:22:46 +0100
|
|
Subject: [PATCH] dts: ipq4019: add both IPQ4019 wifi block definitions
|
|
|
|
The IPQ4019 has two ath10k blocks on the AHB. Both wifi's
|
|
are already supported by ath10k.
|
|
|
|
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
|
|
---
|
|
arch/arm/boot/dts/qcom-ipq4019.dtsi | 84 +++++++++++++++++++++++++++++++++++++
|
|
1 file changed, 84 insertions(+)
|
|
|
|
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
|
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
|
@@ -384,5 +384,89 @@
|
|
dr_mode = "host";
|
|
};
|
|
};
|
|
+
|
|
+ wifi0: wifi@a000000 {
|
|
+ compatible = "qcom,ipq4019-wifi";
|
|
+ reg = <0xa000000 0x200000>;
|
|
+ resets = <&gcc WIFI0_CPU_INIT_RESET
|
|
+ &gcc WIFI0_RADIO_SRIF_RESET
|
|
+ &gcc WIFI0_RADIO_WARM_RESET
|
|
+ &gcc WIFI0_RADIO_COLD_RESET
|
|
+ &gcc WIFI0_CORE_WARM_RESET
|
|
+ &gcc WIFI0_CORE_COLD_RESET>;
|
|
+ reset-names = "wifi_cpu_init", "wifi_radio_srif",
|
|
+ "wifi_radio_warm", "wifi_radio_cold",
|
|
+ "wifi_core_warm", "wifi_core_cold";
|
|
+ clocks = <&gcc GCC_WCSS2G_CLK
|
|
+ &gcc GCC_WCSS2G_REF_CLK
|
|
+ &gcc GCC_WCSS2G_RTC_CLK>;
|
|
+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
|
|
+ "wifi_wcss_rtc";
|
|
+ interrupts = <0 32 IRQ_TYPE_EDGE_RISING
|
|
+ 0 33 IRQ_TYPE_EDGE_RISING
|
|
+ 0 34 IRQ_TYPE_EDGE_RISING
|
|
+ 0 35 IRQ_TYPE_EDGE_RISING
|
|
+ 0 36 IRQ_TYPE_EDGE_RISING
|
|
+ 0 37 IRQ_TYPE_EDGE_RISING
|
|
+ 0 38 IRQ_TYPE_EDGE_RISING
|
|
+ 0 39 IRQ_TYPE_EDGE_RISING
|
|
+ 0 40 IRQ_TYPE_EDGE_RISING
|
|
+ 0 41 IRQ_TYPE_EDGE_RISING
|
|
+ 0 42 IRQ_TYPE_EDGE_RISING
|
|
+ 0 43 IRQ_TYPE_EDGE_RISING
|
|
+ 0 44 IRQ_TYPE_EDGE_RISING
|
|
+ 0 45 IRQ_TYPE_EDGE_RISING
|
|
+ 0 46 IRQ_TYPE_EDGE_RISING
|
|
+ 0 47 IRQ_TYPE_EDGE_RISING
|
|
+ 0 168 IRQ_TYPE_NONE>;
|
|
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
|
|
+ "msi4", "msi5", "msi6", "msi7",
|
|
+ "msi8", "msi9", "msi10", "msi11",
|
|
+ "msi12", "msi13", "msi14", "msi15",
|
|
+ "legacy";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ wifi1: wifi@a800000 {
|
|
+ compatible = "qcom,ipq4019-wifi";
|
|
+ reg = <0xa800000 0x200000>;
|
|
+ resets = <&gcc WIFI1_CPU_INIT_RESET
|
|
+ &gcc WIFI1_RADIO_SRIF_RESET
|
|
+ &gcc WIFI1_RADIO_WARM_RESET
|
|
+ &gcc WIFI1_RADIO_COLD_RESET
|
|
+ &gcc WIFI1_CORE_WARM_RESET
|
|
+ &gcc WIFI1_CORE_COLD_RESET>;
|
|
+ reset-names = "wifi_cpu_init", "wifi_radio_srif",
|
|
+ "wifi_radio_warm", "wifi_radio_cold",
|
|
+ "wifi_core_warm", "wifi_core_cold";
|
|
+ clocks = <&gcc GCC_WCSS5G_CLK
|
|
+ &gcc GCC_WCSS5G_REF_CLK
|
|
+ &gcc GCC_WCSS5G_RTC_CLK>;
|
|
+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
|
|
+ "wifi_wcss_rtc";
|
|
+ interrupts = <0 48 IRQ_TYPE_EDGE_RISING
|
|
+ 0 49 IRQ_TYPE_EDGE_RISING
|
|
+ 0 50 IRQ_TYPE_EDGE_RISING
|
|
+ 0 51 IRQ_TYPE_EDGE_RISING
|
|
+ 0 52 IRQ_TYPE_EDGE_RISING
|
|
+ 0 53 IRQ_TYPE_EDGE_RISING
|
|
+ 0 54 IRQ_TYPE_EDGE_RISING
|
|
+ 0 55 IRQ_TYPE_EDGE_RISING
|
|
+ 0 56 IRQ_TYPE_EDGE_RISING
|
|
+ 0 57 IRQ_TYPE_EDGE_RISING
|
|
+ 0 58 IRQ_TYPE_EDGE_RISING
|
|
+ 0 59 IRQ_TYPE_EDGE_RISING
|
|
+ 0 60 IRQ_TYPE_EDGE_RISING
|
|
+ 0 61 IRQ_TYPE_EDGE_RISING
|
|
+ 0 62 IRQ_TYPE_EDGE_RISING
|
|
+ 0 63 IRQ_TYPE_EDGE_RISING
|
|
+ 0 169 IRQ_TYPE_NONE>;
|
|
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
|
|
+ "msi4", "msi5", "msi6", "msi7",
|
|
+ "msi8", "msi9", "msi10", "msi11",
|
|
+ "msi12", "msi13", "msi14", "msi15",
|
|
+ "legacy";
|
|
+ status = "disabled";
|
|
+ };
|
|
};
|
|
};
|