mirror of https://github.com/hak5/openwrt-owl.git
122 lines
3.4 KiB
Plaintext
122 lines
3.4 KiB
Plaintext
--- linux-mips-cvs/arch/mips/kernel/cpu-probe.c 2005-01-31 12:59:30.000000000 +0100
|
|
+++ linux-broadcom/arch/mips/kernel/cpu-probe.c 2005-01-31 13:13:14.000000000 +0100
|
|
@@ -175,7 +175,7 @@
|
|
|
|
static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
|
|
{
|
|
- switch (c->processor_id & 0xff00) {
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
case PRID_IMP_R2000:
|
|
c->cputype = CPU_R2000;
|
|
c->isa_level = MIPS_CPU_ISA_I;
|
|
@@ -185,7 +185,7 @@
|
|
c->tlbsize = 64;
|
|
break;
|
|
case PRID_IMP_R3000:
|
|
- if ((c->processor_id & 0xff) == PRID_REV_R3000A)
|
|
+ if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A)
|
|
if (cpu_has_confreg())
|
|
c->cputype = CPU_R3081E;
|
|
else
|
|
@@ -200,12 +200,12 @@
|
|
break;
|
|
case PRID_IMP_R4000:
|
|
if (read_c0_config() & CONF_SC) {
|
|
- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
|
|
+ if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
|
|
c->cputype = CPU_R4400PC;
|
|
else
|
|
c->cputype = CPU_R4000PC;
|
|
} else {
|
|
- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
|
|
+ if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
|
|
c->cputype = CPU_R4400SC;
|
|
else
|
|
c->cputype = CPU_R4000SC;
|
|
@@ -451,7 +451,7 @@
|
|
static inline void cpu_probe_mips(struct cpuinfo_mips *c)
|
|
{
|
|
decode_config1(c);
|
|
- switch (c->processor_id & 0xff00) {
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
case PRID_IMP_4KC:
|
|
c->cputype = CPU_4KC;
|
|
c->isa_level = MIPS_CPU_ISA_M32;
|
|
@@ -492,10 +492,10 @@
|
|
{
|
|
decode_config1(c);
|
|
c->options |= MIPS_CPU_PREFETCH;
|
|
- switch (c->processor_id & 0xff00) {
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
case PRID_IMP_AU1_REV1:
|
|
case PRID_IMP_AU1_REV2:
|
|
- switch ((c->processor_id >> 24) & 0xff) {
|
|
+ switch ((c->processor_id >> 24) & PRID_REV_MASK) {
|
|
case 0:
|
|
c->cputype = CPU_AU1000;
|
|
break;
|
|
@@ -523,10 +523,34 @@
|
|
}
|
|
}
|
|
|
|
+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
|
|
+{
|
|
+ decode_config1(c);
|
|
+ c->options |= MIPS_CPU_PREFETCH;
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
+ case PRID_IMP_BCM4710:
|
|
+ c->cputype = CPU_BCM4710;
|
|
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
|
|
+ MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
|
|
+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
|
|
+ break;
|
|
+ case PRID_IMP_4KC:
|
|
+ case PRID_IMP_BCM3302:
|
|
+ c->cputype = CPU_BCM3302;
|
|
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
|
|
+ MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
|
|
+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
|
|
+ break;
|
|
+ default:
|
|
+ c->cputype = CPU_UNKNOWN;
|
|
+ break;
|
|
+ }
|
|
+}
|
|
+
|
|
static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
|
|
{
|
|
decode_config1(c);
|
|
- switch (c->processor_id & 0xff00) {
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
case PRID_IMP_SB1:
|
|
c->cputype = CPU_SB1;
|
|
c->isa_level = MIPS_CPU_ISA_M64;
|
|
@@ -548,7 +572,7 @@
|
|
static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
|
|
{
|
|
decode_config1(c);
|
|
- switch (c->processor_id & 0xff00) {
|
|
+ switch (c->processor_id & PRID_IMP_MASK) {
|
|
case PRID_IMP_SR71000:
|
|
c->cputype = CPU_SR71000;
|
|
c->isa_level = MIPS_CPU_ISA_M64;
|
|
@@ -573,7 +597,7 @@
|
|
c->cputype = CPU_UNKNOWN;
|
|
|
|
c->processor_id = read_c0_prid();
|
|
- switch (c->processor_id & 0xff0000) {
|
|
+ switch (c->processor_id & PRID_COMP_MASK) {
|
|
|
|
case PRID_COMP_LEGACY:
|
|
cpu_probe_legacy(c);
|
|
@@ -584,6 +608,9 @@
|
|
case PRID_COMP_ALCHEMY:
|
|
cpu_probe_alchemy(c);
|
|
break;
|
|
+ case PRID_COMP_BROADCOM:
|
|
+ cpu_probe_broadcom(c);
|
|
+ break;
|
|
case PRID_COMP_SIBYTE:
|
|
cpu_probe_sibyte(c);
|
|
break;
|