mirror of https://github.com/hak5/openwrt-owl.git
597 lines
17 KiB
Diff
597 lines
17 KiB
Diff
--- a/arch/mips/config-shared.in
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+++ b/arch/mips/config-shared.in
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@@ -208,6 +208,14 @@ if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]
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fi
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define_bool CONFIG_MIPS_RTC y
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fi
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+dep_bool 'Support for Broadcom MIPS-based boards' CONFIG_MIPS_BRCM $CONFIG_EXPERIMENTAL
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+dep_bool 'Support for Broadcom BCM947XX' CONFIG_BCM947XX $CONFIG_MIPS_BRCM
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+if [ "$CONFIG_BCM947XX" = "y" ] ; then
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+ bool ' Support for Broadcom BCM4710' CONFIG_BCM4710
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+ bool ' Support for Broadcom BCM4310' CONFIG_BCM4310
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+ bool ' Support for Broadcom BCM4704' CONFIG_BCM4704
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+ bool ' Support for Broadcom BCM5365' CONFIG_BCM5365
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+fi
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bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI
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bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226
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bool 'Support for TANBAC TB0229 (VR4131DIMM)' CONFIG_TANBAC_TB0229
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@@ -229,6 +237,11 @@ define_bool CONFIG_RWSEM_GENERIC_SPINLOC
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define_bool CONFIG_RWSEM_XCHGADD_ALGORITHM n
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#
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+# Provide an option for a default kernel command line
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+#
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+string 'Default kernel command string' CONFIG_CMDLINE ""
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+
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+#
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# Select some configuration options automatically based on user selections.
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#
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if [ "$CONFIG_ACER_PICA_61" = "y" ]; then
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@@ -554,6 +567,12 @@ if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]
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define_bool CONFIG_SWAP_IO_SPACE_L y
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define_bool CONFIG_BOOT_ELF32 y
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fi
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+if [ "$CONFIG_BCM947XX" = "y" ] ; then
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+ define_bool CONFIG_PCI y
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+ define_bool CONFIG_NONCOHERENT_IO y
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+ define_bool CONFIG_NEW_TIME_C y
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+ define_bool CONFIG_NEW_IRQ y
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+fi
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if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then
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define_bool CONFIG_ARC32 y
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define_bool CONFIG_ARC_MEMORY y
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@@ -1042,7 +1061,11 @@ comment 'Kernel hacking'
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bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE
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bool 'Enable run-time debugging' CONFIG_RUNTIME_DEBUG
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-bool 'Remote GDB kernel debugging' CONFIG_KGDB
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+if [ "$CONFIG_BCM947XX" = "y" ] ; then
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+ bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
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+else
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+ bool 'Remote GDB kernel debugging' CONFIG_KGDB
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+fi
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dep_bool ' Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_KGDB
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if [ "$CONFIG_KGDB" = "y" ]; then
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define_bool CONFIG_DEBUG_INFO y
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--- a/arch/mips/kernel/cpu-probe.c
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+++ b/arch/mips/kernel/cpu-probe.c
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@@ -162,7 +162,7 @@ static inline int __cpu_has_fpu(void)
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static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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{
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- switch (c->processor_id & 0xff00) {
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+ switch (c->processor_id & PRID_IMP_MASK) {
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case PRID_IMP_R2000:
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c->cputype = CPU_R2000;
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c->isa_level = MIPS_CPU_ISA_I;
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@@ -172,7 +172,7 @@ static inline void cpu_probe_legacy(stru
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c->tlbsize = 64;
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break;
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case PRID_IMP_R3000:
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- if ((c->processor_id & 0xff) == PRID_REV_R3000A)
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+ if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A)
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if (cpu_has_confreg())
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c->cputype = CPU_R3081E;
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else
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@@ -187,12 +187,12 @@ static inline void cpu_probe_legacy(stru
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break;
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case PRID_IMP_R4000:
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if (read_c0_config() & CONF_SC) {
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- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
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+ if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
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c->cputype = CPU_R4400PC;
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else
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c->cputype = CPU_R4000PC;
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} else {
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- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
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+ if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
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c->cputype = CPU_R4400SC;
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else
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c->cputype = CPU_R4000SC;
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@@ -438,7 +438,7 @@ static inline void decode_config1(struct
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static inline void cpu_probe_mips(struct cpuinfo_mips *c)
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{
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decode_config1(c);
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- switch (c->processor_id & 0xff00) {
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+ switch (c->processor_id & PRID_IMP_MASK) {
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case PRID_IMP_4KC:
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c->cputype = CPU_4KC;
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c->isa_level = MIPS_CPU_ISA_M32;
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@@ -479,10 +479,10 @@ static inline void cpu_probe_alchemy(str
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{
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decode_config1(c);
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c->options |= MIPS_CPU_PREFETCH;
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- switch (c->processor_id & 0xff00) {
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+ switch (c->processor_id & PRID_IMP_MASK) {
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case PRID_IMP_AU1_REV1:
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case PRID_IMP_AU1_REV2:
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- switch ((c->processor_id >> 24) & 0xff) {
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+ switch ((c->processor_id >> 24) & PRID_REV_MASK) {
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case 0:
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c->cputype = CPU_AU1000;
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break;
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@@ -510,10 +510,34 @@ static inline void cpu_probe_alchemy(str
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}
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}
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+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
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+{
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+ decode_config1(c);
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+ c->options |= MIPS_CPU_PREFETCH;
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+ switch (c->processor_id & PRID_IMP_MASK) {
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+ case PRID_IMP_BCM4710:
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+ c->cputype = CPU_BCM4710;
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+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
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+ MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
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+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
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+ break;
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+ case PRID_IMP_4KC:
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+ case PRID_IMP_BCM3302:
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+ c->cputype = CPU_BCM3302;
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+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
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+ MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
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+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
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+ break;
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+ default:
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+ c->cputype = CPU_UNKNOWN;
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+ break;
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+ }
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+}
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+
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static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
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{
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decode_config1(c);
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- switch (c->processor_id & 0xff00) {
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+ switch (c->processor_id & PRID_IMP_MASK) {
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case PRID_IMP_SB1:
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c->cputype = CPU_SB1;
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c->isa_level = MIPS_CPU_ISA_M64;
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@@ -535,7 +559,7 @@ static inline void cpu_probe_sibyte(stru
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static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
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{
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decode_config1(c);
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- switch (c->processor_id & 0xff00) {
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+ switch (c->processor_id & PRID_IMP_MASK) {
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case PRID_IMP_SR71000:
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c->cputype = CPU_SR71000;
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c->isa_level = MIPS_CPU_ISA_M64;
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@@ -560,7 +584,7 @@ __init void cpu_probe(void)
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c->cputype = CPU_UNKNOWN;
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c->processor_id = read_c0_prid();
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- switch (c->processor_id & 0xff0000) {
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+ switch (c->processor_id & PRID_COMP_MASK) {
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case PRID_COMP_LEGACY:
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cpu_probe_legacy(c);
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@@ -571,6 +595,9 @@ __init void cpu_probe(void)
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case PRID_COMP_ALCHEMY:
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cpu_probe_alchemy(c);
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break;
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+ case PRID_COMP_BROADCOM:
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+ cpu_probe_broadcom(c);
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+ break;
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case PRID_COMP_SIBYTE:
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cpu_probe_sibyte(c);
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break;
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--- a/arch/mips/kernel/head.S
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+++ b/arch/mips/kernel/head.S
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@@ -28,12 +28,20 @@
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#include <asm/mipsregs.h>
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#include <asm/stackframe.h>
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+#ifdef CONFIG_BCM4710
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+#undef eret
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+#define eret nop; nop; eret
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+#endif
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+
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.text
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+ j kernel_entry
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+ nop
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+
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/*
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* Reserved space for exception handlers.
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* Necessary for machines which link their kernels at KSEG0.
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*/
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- .fill 0x400
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+ .fill 0x3f4
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/* The following two symbols are used for kernel profiling. */
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EXPORT(stext)
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--- a/arch/mips/kernel/proc.c
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+++ b/arch/mips/kernel/proc.c
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@@ -78,9 +78,10 @@ static const char *cpu_name[] = {
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[CPU_AU1550] "Au1550",
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[CPU_24K] "MIPS 24K",
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[CPU_AU1200] "Au1200",
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+ [CPU_BCM4710] "BCM4710",
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+ [CPU_BCM3302] "BCM3302",
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};
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-
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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unsigned int version = current_cpu_data.processor_id;
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--- a/arch/mips/kernel/setup.c
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+++ b/arch/mips/kernel/setup.c
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@@ -493,6 +493,7 @@ void __init setup_arch(char **cmdline_p)
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void swarm_setup(void);
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void hp_setup(void);
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void au1x00_setup(void);
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+ void brcm_setup(void);
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void frame_info_init(void);
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frame_info_init();
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@@ -691,6 +692,11 @@ void __init setup_arch(char **cmdline_p)
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pmc_yosemite_setup();
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break;
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#endif
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+#if defined(CONFIG_BCM4710) || defined(CONFIG_BCM4310)
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+ case MACH_GROUP_BRCM:
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+ brcm_setup();
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+ break;
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+#endif
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default:
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panic("Unsupported architecture");
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}
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--- a/arch/mips/kernel/traps.c
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+++ b/arch/mips/kernel/traps.c
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@@ -920,6 +920,7 @@ void __init per_cpu_trap_init(void)
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void __init trap_init(void)
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{
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extern char except_vec1_generic;
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+ extern char except_vec2_generic;
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extern char except_vec3_generic, except_vec3_r4000;
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extern char except_vec_ejtag_debug;
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extern char except_vec4;
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@@ -927,6 +928,7 @@ void __init trap_init(void)
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/* Copy the generic exception handler code to it's final destination. */
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memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
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+ memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
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/*
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* Setup default vectors
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@@ -985,6 +987,12 @@ void __init trap_init(void)
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set_except_vector(13, handle_tr);
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set_except_vector(22, handle_mdmx);
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+ if (current_cpu_data.cputype == CPU_SB1) {
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+ /* Enable timer interrupt and scd mapped interrupt */
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+ clear_c0_status(0xf000);
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+ set_c0_status(0xc00);
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+ }
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+
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if (cpu_has_fpu && !cpu_has_nofpuex)
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set_except_vector(15, handle_fpe);
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -726,6 +726,19 @@ LOADADDR += 0x80020000
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endif
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#
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+# Broadcom BCM947XX variants
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+#
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+ifdef CONFIG_BCM947XX
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+LIBS += arch/mips/bcm947xx/generic/brcm.o arch/mips/bcm947xx/bcm947xx.o
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+SUBDIRS += arch/mips/bcm947xx/generic arch/mips/bcm947xx
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+LOADADDR := 0x80001000
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+
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+zImage: vmlinux
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+ $(MAKE) -C arch/$(ARCH)/bcm947xx/compressed
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+export LOADADDR
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+endif
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+
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+#
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# Choosing incompatible machines durings configuration will result in
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# error messages during linking. Select a default linkscript if
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# none has been choosen above.
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@@ -779,6 +792,7 @@ archclean:
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$(MAKE) -C arch/$(ARCH)/tools clean
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$(MAKE) -C arch/mips/baget clean
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$(MAKE) -C arch/mips/lasat clean
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+ $(MAKE) -C arch/mips/bcm947xx/compressed clean
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archmrproper:
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@$(MAKEBOOT) mrproper
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--- a/arch/mips/mm/c-r4k.c
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+++ b/arch/mips/mm/c-r4k.c
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@@ -1118,3 +1118,47 @@ void __init ld_mmu_r4xx0(void)
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build_clear_page();
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build_copy_page();
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}
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+
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+#ifdef CONFIG_BCM4704
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+static void __init mips32_icache_fill(unsigned long addr, uint nbytes)
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+{
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+ unsigned long ic_lsize = current_cpu_data.icache.linesz;
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+ int i;
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+ for (i = 0; i < nbytes; i += ic_lsize)
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+ fill_icache_line((addr + i));
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+}
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+
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+/*
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+ * This must be run from the cache on 4704A0
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+ * so there are no mips core BIU ops in progress
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+ * when the PFC is enabled.
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+ */
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+#define PFC_CR0 0xff400000 /* control reg 0 */
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+#define PFC_CR1 0xff400004 /* control reg 1 */
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+static void __init enable_pfc(u32 mode)
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+{
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+ /* write range */
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+ *(volatile u32 *)PFC_CR1 = 0xffff0000;
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+
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+ /* enable */
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+ *(volatile u32 *)PFC_CR0 = mode;
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+}
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+#endif
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+
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+
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+void check_enable_mips_pfc(int val)
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+{
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+
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+#ifdef CONFIG_BCM4704
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+ struct cpuinfo_mips *c = ¤t_cpu_data;
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+
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+ /* enable prefetch cache */
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+ if (((c->processor_id & (PRID_COMP_MASK | PRID_IMP_MASK)) == PRID_IMP_BCM3302)
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+ && (read_c0_diag() & (1 << 29))) {
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+ mips32_icache_fill((unsigned long) &enable_pfc, 64);
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+ enable_pfc(val);
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+ }
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+#endif
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+}
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+
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+
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--- a/arch/mips/pci/Makefile
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+++ b/arch/mips/pci/Makefile
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@@ -13,7 +13,9 @@ obj-$(CONFIG_MIPS_GT64120) += ops-gt6412
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obj-$(CONFIG_MIPS_MSC) += ops-msc.o
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obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
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obj-$(CONFIG_SNI_RM200_PCI) += ops-sni.o
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+ifndef CONFIG_BCM947XX
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obj-y += pci.o
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+endif
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obj-$(CONFIG_PCI_AUTO) += pci_auto.o
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include $(TOPDIR)/Rules.make
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--- a/drivers/char/serial.c
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+++ b/drivers/char/serial.c
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@@ -444,6 +444,10 @@ static _INLINE_ unsigned int serial_in(s
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return inb(info->port+1);
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#endif
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case SERIAL_IO_MEM:
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+#ifdef CONFIG_BCM4310
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+ readb((unsigned long) info->iomem_base +
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+ (UART_SCR<<info->iomem_reg_shift));
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+#endif
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return readb((unsigned long) info->iomem_base +
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(offset<<info->iomem_reg_shift));
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default:
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@@ -464,6 +468,9 @@ static _INLINE_ void serial_out(struct a
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case SERIAL_IO_MEM:
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writeb(value, (unsigned long) info->iomem_base +
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(offset<<info->iomem_reg_shift));
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+#ifdef CONFIG_BCM4704
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+ *((volatile unsigned int *) KSEG1ADDR(0x18000000));
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+#endif
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break;
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default:
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outb(value, info->port+offset);
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@@ -1728,7 +1735,7 @@ static void change_speed(struct async_st
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/* Special case since 134 is really 134.5 */
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quot = (2*baud_base / 269);
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else if (baud)
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- quot = baud_base / baud;
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+ quot = (baud_base + (baud / 2)) / baud;
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}
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/* If the quotient is zero refuse the change */
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if (!quot && old_termios) {
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@@ -1745,12 +1752,12 @@ static void change_speed(struct async_st
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/* Special case since 134 is really 134.5 */
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quot = (2*baud_base / 269);
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else if (baud)
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- quot = baud_base / baud;
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+ quot = (baud_base + (baud / 2)) / baud;
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}
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}
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/* As a last resort, if the quotient is zero, default to 9600 bps */
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if (!quot)
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- quot = baud_base / 9600;
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+ quot = (baud_base + 4800) / 9600;
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/*
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* Work around a bug in the Oxford Semiconductor 952 rev B
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* chip which causes it to seriously miscalculate baud rates
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@@ -5994,6 +6001,13 @@ static int __init serial_console_setup(s
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* Divisor, bytesize and parity
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*/
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state = rs_table + co->index;
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+ /*
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+ * Safe guard: state structure must have been initialized
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+ */
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+ if (state->iomem_base == NULL) {
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+ printk("!unable to setup serial console!\n");
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+ return -1;
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+ }
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if (doflow)
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state->flags |= ASYNC_CONS_FLOW;
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info = &async_sercons;
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@@ -6007,7 +6021,7 @@ static int __init serial_console_setup(s
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info->io_type = state->io_type;
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info->iomem_base = state->iomem_base;
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info->iomem_reg_shift = state->iomem_reg_shift;
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- quot = state->baud_base / baud;
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+ quot = (state->baud_base + (baud / 2)) / baud;
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cval = cflag & (CSIZE | CSTOPB);
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#if defined(__powerpc__) || defined(__alpha__)
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cval >>= 8;
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--- a/drivers/net/Makefile
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+++ b/drivers/net/Makefile
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@@ -3,6 +3,8 @@
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# Makefile for the Linux network (ethercard) device drivers.
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#
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+EXTRA_CFLAGS := -I$(TOPDIR)/arch/mips/bcm947xx/include
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+
|
|
obj-y :=
|
|
obj-m :=
|
|
obj-n :=
|
|
--- a/drivers/parport/Config.in
|
|
+++ b/drivers/parport/Config.in
|
|
@@ -11,6 +11,7 @@ comment 'Parallel port support'
|
|
tristate 'Parallel port support' CONFIG_PARPORT
|
|
if [ "$CONFIG_PARPORT" != "n" ]; then
|
|
dep_tristate ' PC-style hardware' CONFIG_PARPORT_PC $CONFIG_PARPORT
|
|
+ dep_tristate ' Asus WL500g parallel port' CONFIG_PARPORT_SPLINK $CONFIG_PARPORT
|
|
if [ "$CONFIG_PARPORT_PC" != "n" -a "$CONFIG_SERIAL" != "n" ]; then
|
|
if [ "$CONFIG_SERIAL" = "m" ]; then
|
|
define_tristate CONFIG_PARPORT_PC_CML1 m
|
|
--- a/drivers/parport/Makefile
|
|
+++ b/drivers/parport/Makefile
|
|
@@ -22,6 +22,7 @@ endif
|
|
|
|
obj-$(CONFIG_PARPORT) += parport.o
|
|
obj-$(CONFIG_PARPORT_PC) += parport_pc.o
|
|
+obj-$(CONFIG_PARPORT_SPLINK) += parport_splink.o
|
|
obj-$(CONFIG_PARPORT_PC_PCMCIA) += parport_cs.o
|
|
obj-$(CONFIG_PARPORT_AMIGA) += parport_amiga.o
|
|
obj-$(CONFIG_PARPORT_MFC3) += parport_mfc3.o
|
|
--- a/include/asm-mips/bootinfo.h
|
|
+++ b/include/asm-mips/bootinfo.h
|
|
@@ -37,6 +37,7 @@
|
|
#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
|
|
#define MACH_GROUP_LASAT 21
|
|
#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
|
|
+#define MACH_GROUP_BRCM 23 /* Broadcom */
|
|
|
|
/*
|
|
* Valid machtype values for group unknown (low order halfword of mips_machtype)
|
|
@@ -197,6 +198,15 @@
|
|
#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */
|
|
|
|
/*
|
|
+ * Valid machtypes for group Broadcom
|
|
+ */
|
|
+#define MACH_BCM93725 0
|
|
+#define MACH_BCM93725_VJ 1
|
|
+#define MACH_BCM93730 2
|
|
+#define MACH_BCM947XX 3
|
|
+#define MACH_BCM933XX 4
|
|
+
|
|
+/*
|
|
* Valid machtype for group TITAN
|
|
*/
|
|
#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
|
|
--- a/include/asm-mips/cpu.h
|
|
+++ b/include/asm-mips/cpu.h
|
|
@@ -22,6 +22,11 @@
|
|
spec.
|
|
*/
|
|
|
|
+#define PRID_COPT_MASK 0xff000000
|
|
+#define PRID_COMP_MASK 0x00ff0000
|
|
+#define PRID_IMP_MASK 0x0000ff00
|
|
+#define PRID_REV_MASK 0x000000ff
|
|
+
|
|
#define PRID_COMP_LEGACY 0x000000
|
|
#define PRID_COMP_MIPS 0x010000
|
|
#define PRID_COMP_BROADCOM 0x020000
|
|
@@ -58,6 +63,7 @@
|
|
#define PRID_IMP_RM7000 0x2700
|
|
#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
|
|
#define PRID_IMP_RM9000 0x3400
|
|
+#define PRID_IMP_BCM4710 0x4000
|
|
#define PRID_IMP_R5432 0x5400
|
|
#define PRID_IMP_R5500 0x5500
|
|
#define PRID_IMP_4KC 0x8000
|
|
@@ -66,10 +72,16 @@
|
|
#define PRID_IMP_4KEC 0x8400
|
|
#define PRID_IMP_4KSC 0x8600
|
|
#define PRID_IMP_25KF 0x8800
|
|
+#define PRID_IMP_BCM3302 0x9000
|
|
+#define PRID_IMP_BCM3303 0x9100
|
|
#define PRID_IMP_24K 0x9300
|
|
|
|
#define PRID_IMP_UNKNOWN 0xff00
|
|
|
|
+#define BCM330X(id) \
|
|
+ (((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3302)) \
|
|
+ || ((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3303)))
|
|
+
|
|
/*
|
|
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
|
|
*/
|
|
@@ -174,7 +186,9 @@
|
|
#define CPU_AU1550 57
|
|
#define CPU_24K 58
|
|
#define CPU_AU1200 59
|
|
-#define CPU_LAST 59
|
|
+#define CPU_BCM4710 60
|
|
+#define CPU_BCM3302 61
|
|
+#define CPU_LAST 61
|
|
|
|
/*
|
|
* ISA Level encodings
|
|
--- a/include/asm-mips/r4kcache.h
|
|
+++ b/include/asm-mips/r4kcache.h
|
|
@@ -567,4 +567,17 @@ static inline void blast_scache128_page_
|
|
cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
|
|
}
|
|
|
|
+extern inline void fill_icache_line(unsigned long addr)
|
|
+{
|
|
+ __asm__ __volatile__(
|
|
+ ".set noreorder\n\t"
|
|
+ ".set mips3\n\t"
|
|
+ "cache %1, (%0)\n\t"
|
|
+ ".set mips0\n\t"
|
|
+ ".set reorder"
|
|
+ :
|
|
+ : "r" (addr),
|
|
+ "i" (Fill));
|
|
+}
|
|
+
|
|
#endif /* __ASM_R4KCACHE_H */
|
|
--- a/include/asm-mips/serial.h
|
|
+++ b/include/asm-mips/serial.h
|
|
@@ -223,6 +223,13 @@
|
|
#define TXX927_SERIAL_PORT_DEFNS
|
|
#endif
|
|
|
|
+#ifdef CONFIG_BCM947XX
|
|
+/* reserve 4 ports to be configured at runtime */
|
|
+#define BCM947XX_SERIAL_PORT_DEFNS { 0, }, { 0, }, { 0, }, { 0, },
|
|
+#else
|
|
+#define BCM947XX_SERIAL_PORT_DEFNS
|
|
+#endif
|
|
+
|
|
#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
|
|
#define STD_SERIAL_PORT_DEFNS \
|
|
/* UART CLK PORT IRQ FLAGS */ \
|
|
@@ -470,6 +477,7 @@
|
|
#define SERIAL_PORT_DFNS \
|
|
ATLAS_SERIAL_PORT_DEFNS \
|
|
AU1000_SERIAL_PORT_DEFNS \
|
|
+ BCM947XX_SERIAL_PORT_DEFNS \
|
|
COBALT_SERIAL_PORT_DEFNS \
|
|
DDB5477_SERIAL_PORT_DEFNS \
|
|
EV96100_SERIAL_PORT_DEFNS \
|
|
--- a/init/do_mounts.c
|
|
+++ b/init/do_mounts.c
|
|
@@ -255,7 +255,13 @@ static struct dev_name_struct {
|
|
{ "ftlb", 0x2c08 },
|
|
{ "ftlc", 0x2c10 },
|
|
{ "ftld", 0x2c18 },
|
|
+#if defined(CONFIG_MTD_BLOCK) || defined(CONFIG_MTD_BLOCK_RO)
|
|
{ "mtdblock", 0x1f00 },
|
|
+ { "mtdblock0",0x1f00 },
|
|
+ { "mtdblock1",0x1f01 },
|
|
+ { "mtdblock2",0x1f02 },
|
|
+ { "mtdblock3",0x1f03 },
|
|
+#endif
|
|
{ "nb", 0x2b00 },
|
|
{ NULL, 0 }
|
|
};
|