mirror of https://github.com/hak5/openwrt-owl.git
444 lines
12 KiB
Diff
444 lines
12 KiB
Diff
From 18fe82b600f9563e59e28746211a2ce3176a81de Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Mon, 6 Jun 2011 00:07:36 +0200
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Subject: [PATCH 08/26] bcm47xx: prepare to support different buses
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Prepare bcm47xx to support different System buses. Before adding
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support for bcma it should be possible to build bcm47xx without the
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need of ssb. With this patch bcm47xx does not directly contain a
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ssb_bus, but a union contain all the supported system buses. As a SoC
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just uses one system bus a union is a good choice.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/mips/bcm47xx/gpio.c | 56 ++++++++++++++++----------
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arch/mips/bcm47xx/nvram.c | 15 +++++--
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arch/mips/bcm47xx/serial.c | 13 +++++-
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arch/mips/bcm47xx/setup.c | 33 ++++++++++++---
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arch/mips/bcm47xx/time.c | 9 +++-
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arch/mips/bcm47xx/wgt634u.c | 14 ++++--
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arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 14 ++++++-
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arch/mips/include/asm/mach-bcm47xx/gpio.h | 55 ++++++++++++++++++-------
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drivers/watchdog/bcm47xx_wdt.c | 12 +++++-
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9 files changed, 160 insertions(+), 61 deletions(-)
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--- a/arch/mips/bcm47xx/gpio.c
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+++ b/arch/mips/bcm47xx/gpio.c
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@@ -20,42 +20,54 @@ static DECLARE_BITMAP(gpio_in_use, BCM47
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int gpio_request(unsigned gpio, const char *tag)
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{
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- if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
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- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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- return -EINVAL;
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-
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- if (ssb_extif_available(&ssb_bcm47xx.extif) &&
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- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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- return -EINVAL;
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-
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- if (test_and_set_bit(gpio, gpio_in_use))
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- return -EBUSY;
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-
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- return 0;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
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+ ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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+ return -EINVAL;
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+
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+ if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
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+ ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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+ return -EINVAL;
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+
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+ if (test_and_set_bit(gpio, gpio_in_use))
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+ return -EBUSY;
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+
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+ return 0;
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+ }
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+ return -EINVAL;
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}
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EXPORT_SYMBOL(gpio_request);
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void gpio_free(unsigned gpio)
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{
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- if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
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- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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- return;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
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+ ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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+ return;
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+
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+ if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
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+ ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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+ return;
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- if (ssb_extif_available(&ssb_bcm47xx.extif) &&
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- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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+ clear_bit(gpio, gpio_in_use);
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return;
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-
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- clear_bit(gpio, gpio_in_use);
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+ }
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}
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EXPORT_SYMBOL(gpio_free);
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int gpio_to_irq(unsigned gpio)
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{
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- if (ssb_chipco_available(&ssb_bcm47xx.chipco))
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- return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
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- else if (ssb_extif_available(&ssb_bcm47xx.extif))
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- return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
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- else
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- return -EINVAL;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco))
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+ return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2;
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+ else if (ssb_extif_available(&bcm47xx_bus.ssb.extif))
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+ return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2;
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+ else
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+ return -EINVAL;
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+ }
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+ return -EINVAL;
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}
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EXPORT_SYMBOL_GPL(gpio_to_irq);
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--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -26,14 +26,21 @@ static char nvram_buf[NVRAM_SPACE];
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/* Probe for NVRAM header */
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static void early_nvram_init(void)
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{
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- struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
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+ struct ssb_mipscore *mcore_ssb;
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struct nvram_header *header;
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int i;
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- u32 base, lim, off;
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+ u32 base = 0;
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+ u32 lim = 0;
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+ u32 off;
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u32 *src, *dst;
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- base = mcore->flash_window;
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- lim = mcore->flash_window_size;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ mcore_ssb = &bcm47xx_bus.ssb.mipscore;
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+ base = mcore_ssb->flash_window;
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+ lim = mcore_ssb->flash_window_size;
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+ break;
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+ }
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off = FLASH_MIN;
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while (off <= lim) {
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--- a/arch/mips/bcm47xx/serial.c
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+++ b/arch/mips/bcm47xx/serial.c
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@@ -23,10 +23,10 @@ static struct platform_device uart8250_d
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},
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};
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-static int __init uart8250_init(void)
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+static int __init uart8250_init_ssb(void)
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{
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int i;
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- struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
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+ struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);
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memset(&uart8250_data, 0, sizeof(uart8250_data));
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@@ -45,6 +45,15 @@ static int __init uart8250_init(void)
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return platform_device_register(&uart8250_device);
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}
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+static int __init uart8250_init(void)
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+{
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return uart8250_init_ssb();
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+ }
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+ return -EINVAL;
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+}
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+
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module_init(uart8250_init);
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MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
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--- a/arch/mips/bcm47xx/setup.c
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+++ b/arch/mips/bcm47xx/setup.c
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@@ -35,15 +35,22 @@
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#include <bcm47xx.h>
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#include <asm/mach-bcm47xx/nvram.h>
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-struct ssb_bus ssb_bcm47xx;
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-EXPORT_SYMBOL(ssb_bcm47xx);
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+union bcm47xx_bus bcm47xx_bus;
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+EXPORT_SYMBOL(bcm47xx_bus);
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+
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+enum bcm47xx_bus_type bcm47xx_bus_type;
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+EXPORT_SYMBOL(bcm47xx_bus_type);
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static void bcm47xx_machine_restart(char *command)
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{
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printk(KERN_ALERT "Please stand by while rebooting the system...\n");
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local_irq_disable();
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/* Set the watchdog timer to reset immediately */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
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+ break;
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+ }
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while (1)
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cpu_relax();
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}
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@@ -52,7 +59,11 @@ static void bcm47xx_machine_halt(void)
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{
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/* Disable interrupts and watchdog and spin forever */
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local_irq_disable();
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
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+ break;
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+ }
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while (1)
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cpu_relax();
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}
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@@ -247,7 +258,7 @@ static int bcm47xx_get_invariants(struct
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return 0;
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}
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-void __init plat_mem_setup(void)
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+static void __init bcm47xx_register_ssb(void)
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{
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int err;
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char buf[100];
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@@ -258,12 +269,12 @@ void __init plat_mem_setup(void)
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printk(KERN_WARNING "bcm47xx: someone else already registered"
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" a ssb SPROM callback handler (err %d)\n", err);
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- err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
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+ err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
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bcm47xx_get_invariants);
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if (err)
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panic("Failed to initialize SSB bus (err %d)\n", err);
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- mcore = &ssb_bcm47xx.mipscore;
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+ mcore = &bcm47xx_bus.ssb.mipscore;
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if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
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if (strstr(buf, "console=ttyS1")) {
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struct ssb_serial_port port;
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@@ -276,6 +287,14 @@ void __init plat_mem_setup(void)
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memcpy(&mcore->serial_ports[1], &port, sizeof(port));
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}
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}
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+}
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+
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+void __init plat_mem_setup(void)
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+{
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+ struct cpuinfo_mips *c = ¤t_cpu_data;
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+
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+ bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
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+ bcm47xx_register_ssb();
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_machine_restart = bcm47xx_machine_restart;
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_machine_halt = bcm47xx_machine_halt;
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--- a/arch/mips/bcm47xx/time.c
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+++ b/arch/mips/bcm47xx/time.c
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@@ -30,7 +30,7 @@
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void __init plat_time_init(void)
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{
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- unsigned long hz;
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+ unsigned long hz = 0;
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/*
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* Use deterministic values for initial counter interrupt
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@@ -39,7 +39,12 @@ void __init plat_time_init(void)
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write_c0_count(0);
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write_c0_compare(0xffff);
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- hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
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+ break;
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+ }
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+
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if (!hz)
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hz = 100000000;
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--- a/arch/mips/bcm47xx/wgt634u.c
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+++ b/arch/mips/bcm47xx/wgt634u.c
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@@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int ir
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/* Interrupts are shared, check if the current one is
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a GPIO interrupt. */
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- if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
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+ if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
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SSB_CHIPCO_IRQ_GPIO))
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return IRQ_NONE;
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@@ -132,22 +132,26 @@ static int __init wgt634u_init(void)
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* machine. Use the MAC address as an heuristic. Netgear Inc. has
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* been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
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*/
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+ u8 *et0mac;
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- u8 *et0mac = ssb_bcm47xx.sprom.et0mac;
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+ if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
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+ return -ENODEV;
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+
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+ et0mac = bcm47xx_bus.ssb.sprom.et0mac;
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if (et0mac[0] == 0x00 &&
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((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
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(et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
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- struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
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+ struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
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printk(KERN_INFO "WGT634U machine detected.\n");
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if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
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gpio_interrupt, IRQF_SHARED,
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- "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
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+ "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
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gpio_direction_input(WGT634U_GPIO_RESET);
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gpio_intmask(WGT634U_GPIO_RESET, 1);
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- ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
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+ ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
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SSB_CHIPCO_IRQ_GPIO,
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SSB_CHIPCO_IRQ_GPIO);
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}
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--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
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+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
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@@ -19,7 +19,17 @@
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#ifndef __ASM_BCM47XX_H
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#define __ASM_BCM47XX_H
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-/* SSB bus */
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-extern struct ssb_bus ssb_bcm47xx;
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+#include <linux/ssb/ssb.h>
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+
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+enum bcm47xx_bus_type {
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+ BCM47XX_BUS_TYPE_SSB,
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+};
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+
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+union bcm47xx_bus {
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+ struct ssb_bus ssb;
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+};
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+
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+extern union bcm47xx_bus bcm47xx_bus;
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+extern enum bcm47xx_bus_type bcm47xx_bus_type;
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#endif /* __ASM_BCM47XX_H */
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--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
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+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
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@@ -21,41 +21,66 @@ extern int gpio_to_irq(unsigned gpio);
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static inline int gpio_get_value(unsigned gpio)
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{
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- return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio);
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+ }
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+ return -EINVAL;
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}
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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- ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
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+ value ? 1 << gpio : 0);
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+ }
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}
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static inline int gpio_direction_input(unsigned gpio)
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{
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- ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
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- return 0;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0);
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+ return 0;
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+ }
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+ return -EINVAL;
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}
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static inline int gpio_direction_output(unsigned gpio, int value)
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{
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- /* first set the gpio out value */
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- ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
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- /* then set the gpio mode */
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- ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
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- return 0;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ /* first set the gpio out value */
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+ ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
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+ value ? 1 << gpio : 0);
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+ /* then set the gpio mode */
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+ ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio);
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+ return 0;
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+ }
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+ return -EINVAL;
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}
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static inline int gpio_intmask(unsigned gpio, int value)
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{
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- ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
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- value ? 1 << gpio : 0);
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- return 0;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio,
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+ value ? 1 << gpio : 0);
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+ return 0;
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+ }
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+ return -EINVAL;
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}
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static inline int gpio_polarity(unsigned gpio, int value)
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{
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- ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
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- value ? 1 << gpio : 0);
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- return 0;
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio,
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+ value ? 1 << gpio : 0);
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+ return 0;
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+ }
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+ return -EINVAL;
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}
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--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -54,12 +54,20 @@ static atomic_t ticks;
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static inline void bcm47xx_wdt_hw_start(void)
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{
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/* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
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+ switch (bcm47xx_bus_type) {
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+ case BCM47XX_BUS_TYPE_SSB:
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+ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff);
|
|
+ break;
|
|
+ }
|
|
}
|
|
|
|
static inline int bcm47xx_wdt_hw_stop(void)
|
|
{
|
|
- return ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
|
|
+ switch (bcm47xx_bus_type) {
|
|
+ case BCM47XX_BUS_TYPE_SSB:
|
|
+ return ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
|
|
+ }
|
|
+ return -EINVAL;
|
|
}
|
|
|
|
static void bcm47xx_timer_tick(unsigned long unused)
|