mirror of https://github.com/hak5/openwrt-owl.git
24 lines
927 B
Diff
24 lines
927 B
Diff
From 55ed27d2c44fcf2e808ba26cc2a1c9c4041500da Mon Sep 17 00:00:00 2001
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From: Grigori Goronzy <greg@blackbox>
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Date: Mon, 11 Jun 2012 18:58:40 +0200
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Subject: [PATCH 015/174] sdhci-bcm2708: assume 50 MHz eMMC clock
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80 MHz clock isnt't suited well to be dividable to get SD clocks of 25
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MHz (default mode) or 50 MHz (high speed mode). 50 MHz are perfect to
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drive the SD interface at ideal frequencies.
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---
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drivers/mmc/host/sdhci-bcm2708.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/mmc/host/sdhci-bcm2708.c
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+++ b/drivers/mmc/host/sdhci-bcm2708.c
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@@ -73,7 +73,7 @@
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#define BCM2708_SDHCI_SLEEP_TIMEOUT 1000 /* msecs */
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/* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */
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-#define BCM2708_EMMC_CLOCK_FREQ 80000000
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+#define BCM2708_EMMC_CLOCK_FREQ 50000000
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/*****************************************************************************\
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* *
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