mirror of https://github.com/hak5/openwrt-owl.git
161 lines
4.2 KiB
Diff
161 lines
4.2 KiB
Diff
--- linux-2.6.21.1.orig/drivers/serial/atmel_serial.c 2007-05-28 12:22:29.000000000 +0200
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+++ linux-2.6.21.1/drivers/serial/atmel_serial.c 2007-05-28 16:39:09.000000000 +0200
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@@ -174,7 +174,35 @@
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at91_set_gpio_value(AT91_PIN_PA21, 0);
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else
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at91_set_gpio_value(AT91_PIN_PA21, 1);
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+
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+ /*
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+ * FDL VersaLink adds GPIOS to provide full modem control on
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+ * USART 0 - Drive DTR and RI pins manually
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+ */
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+ if (mctrl & TIOCM_DTR)
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+ at91_set_gpio_value(AT91_PIN_PB6, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB6, 1);
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+ if (mctrl & TIOCM_RI)
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+ at91_set_gpio_value(AT91_PIN_PB7, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB7, 1);
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}
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+
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+ /*
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+ * FDL VersaLink adds GPIOS to provide full modem control on
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+ * USART 3 - Drive DTR and RI pins manually
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+ */
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+ if (port->mapbase == AT91RM9200_BASE_US3) {
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+ if (mctrl & TIOCM_DTR)
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+ at91_set_gpio_value(AT91_PIN_PB29, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB29, 1);
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+ if (mctrl & TIOCM_RI)
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+ at91_set_gpio_value(AT91_PIN_PB2, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB2, 1);
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+ }
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}
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#endif
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@@ -211,8 +239,10 @@
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/*
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* The control signals are active low.
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*/
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- if (!(status & ATMEL_US_DCD))
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- ret |= TIOCM_CD;
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+
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+ if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
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+ if (!(status & ATMEL_US_DCD))
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+ ret |= TIOCM_CD;
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if (!(status & ATMEL_US_CTS))
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ret |= TIOCM_CTS;
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if (!(status & ATMEL_US_DSR))
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@@ -220,6 +250,16 @@
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if (!(status & ATMEL_US_RI))
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ret |= TIOCM_RI;
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+ /*
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+ * Read the GPIO's for the FDL VersaLink special case
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+ */
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ if (!(at91_get_gpio_value(AT91_PIN_PA19)))
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+ ret |= TIOCM_CD;
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ if (!(at91_get_gpio_value(AT91_PIN_PA24)))
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+ ret |= TIOCM_CD;
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+
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return ret;
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}
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@@ -511,6 +551,34 @@
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}
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/*
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+ * USART0 DCD Interrupt handler
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+ */
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+
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+static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id)
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+{
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+ struct uart_port *port = dev_id;
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+ int status = at91_get_gpio_value(irq);
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+
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+ uart_handle_dcd_change(port, !(status));
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+
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+ return IRQ_HANDLED;
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+}
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+
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+/*
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+ * USART3 DCD Interrupt handler
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+ */
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+
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+static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id)
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+{
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+ struct uart_port *port = dev_id;
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+ int status = at91_get_gpio_value(irq);
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+
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+ uart_handle_dcd_change(port, !(status));
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+
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+ return IRQ_HANDLED;
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+}
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+
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+/*
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* Interrupt handler
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*/
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static irqreturn_t atmel_interrupt(int irq, void *dev_id)
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@@ -587,6 +655,23 @@
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return retval;
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}
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+ if (port->mapbase == AT91RM9200_BASE_US0) {
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+ retval = request_irq(AT91_PIN_PA19, atmel_u0_DCD_interrupt, 0, "atmel_serial", port);
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+ if (retval) {
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+ printk("atmel_serial: atmel_startup - Can't get u0DCD irq\n");
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+ free_irq(port->irq, port);
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+ return retval;
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+ }
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+ }
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+ if (port->mapbase == AT91RM9200_BASE_US3) {
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+ retval = request_irq(AT91_PIN_PA24, atmel_u3_DCD_interrupt, 0, "atmel_serial", port);
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+ if (retval) {
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+ printk("atmel_serial: atmel_startup - Can't get u3DCD irq\n");
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+ free_irq(port->irq, port);
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+ return retval;
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+ }
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+ }
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+
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/*
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* Initialize DMA (if necessary)
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*/
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@@ -603,6 +688,10 @@
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kfree(atmel_port->pdc_rx[0].buf);
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}
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free_irq(port->irq, port);
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ free_irq(AT91_PIN_PA19, port);
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ free_irq(AT91_PIN_PA24, port);
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return -ENOMEM;
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}
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pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
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@@ -636,6 +725,10 @@
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retval = atmel_open_hook(port);
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if (retval) {
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free_irq(port->irq, port);
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ free_irq(AT91_PIN_PA19, port);
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ free_irq(AT91_PIN_PA24, port);
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return retval;
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}
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}
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@@ -701,6 +794,10 @@
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* Free the interrupt
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*/
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free_irq(port->irq, port);
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ free_irq(AT91_PIN_PA19, port);
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ free_irq(AT91_PIN_PA24, port);
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/*
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* If there is a specific "close" function (to unregister
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