mirror of https://github.com/hak5/openwrt-owl.git
562 lines
15 KiB
Diff
562 lines
15 KiB
Diff
--- a/drivers/ssb/Kconfig
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+++ b/drivers/ssb/Kconfig
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@@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
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config SSB_DRIVER_GPIO
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bool "SSB GPIO driver"
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depends on SSB && GPIOLIB
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+ select IRQ_DOMAIN if SSB_EMBEDDED
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help
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Driver to provide access to the GPIO pins on the bus.
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--- a/drivers/ssb/driver_chipcommon_sflash.c
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+++ b/drivers/ssb/driver_chipcommon_sflash.c
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@@ -37,7 +37,7 @@ static const struct ssb_sflash_tbl_e ssb
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{ "M25P32", 0x15, 0x10000, 64, },
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{ "M25P64", 0x16, 0x10000, 128, },
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{ "M25FL128", 0x17, 0x10000, 256, },
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- { 0 },
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+ { NULL },
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};
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static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
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@@ -55,7 +55,7 @@ static const struct ssb_sflash_tbl_e ssb
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{ "SST25VF016", 0x41, 0x1000, 512, },
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{ "SST25VF032", 0x4a, 0x1000, 1024, },
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{ "SST25VF064", 0x4b, 0x1000, 2048, },
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- { 0 },
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+ { NULL },
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};
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static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
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@@ -66,7 +66,7 @@ static const struct ssb_sflash_tbl_e ssb
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{ "AT45DB161", 0x2c, 512, 4096, },
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{ "AT45DB321", 0x34, 512, 8192, },
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{ "AT45DB642", 0x3c, 1024, 8192, },
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- { 0 },
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+ { NULL },
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};
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static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
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--- a/drivers/ssb/driver_gpio.c
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+++ b/drivers/ssb/driver_gpio.c
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@@ -9,16 +9,40 @@
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*/
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#include <linux/gpio.h>
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+#include <linux/irq.h>
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+#include <linux/interrupt.h>
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+#include <linux/irqdomain.h>
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#include <linux/export.h>
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#include <linux/ssb/ssb.h>
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#include "ssb_private.h"
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+
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+/**************************************************
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+ * Shared
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+ **************************************************/
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+
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static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
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{
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return container_of(chip, struct ssb_bus, gpio);
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}
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+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
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+static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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+{
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+ struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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+
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+ if (bus->bustype == SSB_BUSTYPE_SSB)
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+ return irq_find_mapping(bus->irq_domain, gpio);
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+ else
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+ return -EINVAL;
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+}
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+#endif
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+
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+/**************************************************
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+ * ChipCommon
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+ **************************************************/
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+
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static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
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ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
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}
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-static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
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+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
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+static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
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{
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- struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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+ struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
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+ int gpio = irqd_to_hwirq(d);
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- if (bus->bustype == SSB_BUSTYPE_SSB)
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- return ssb_mips_irq(bus->chipco.dev) + 2;
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- else
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- return -EINVAL;
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+ ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
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+}
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+
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+static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
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+{
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+ struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
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+ int gpio = irqd_to_hwirq(d);
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+ u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
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+
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+ ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
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+ ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
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+}
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+
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+static struct irq_chip ssb_gpio_irq_chipco_chip = {
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+ .name = "SSB-GPIO-CC",
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+ .irq_mask = ssb_gpio_irq_chipco_mask,
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+ .irq_unmask = ssb_gpio_irq_chipco_unmask,
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+};
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+
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+static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
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+{
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+ struct ssb_bus *bus = dev_id;
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+ struct ssb_chipcommon *chipco = &bus->chipco;
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+ u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
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+ u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
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+ u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
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+ unsigned long irqs = (val ^ pol) & mask;
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+ int gpio;
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+
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+ if (!irqs)
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+ return IRQ_NONE;
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+
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+ for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
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+ generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
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+ ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
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+{
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+ struct ssb_chipcommon *chipco = &bus->chipco;
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+ struct gpio_chip *chip = &bus->gpio;
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+ int gpio, hwirq, err;
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+
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+ if (bus->bustype != SSB_BUSTYPE_SSB)
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+ return 0;
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+
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+ bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
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+ &irq_domain_simple_ops, chipco);
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+ if (!bus->irq_domain) {
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+ err = -ENODEV;
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+ goto err_irq_domain;
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+ }
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_create_mapping(bus->irq_domain, gpio);
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+
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+ irq_set_chip_data(irq, bus);
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+ irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
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+ handle_simple_irq);
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+ }
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+
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+ hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
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+ err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
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+ "gpio", bus);
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+ if (err)
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+ goto err_req_irq;
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+
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+ ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
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+ chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
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+
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+ return 0;
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+
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+err_req_irq:
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_find_mapping(bus->irq_domain, gpio);
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+
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+ irq_dispose_mapping(irq);
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+ }
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+ irq_domain_remove(bus->irq_domain);
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+err_irq_domain:
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+ return err;
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+}
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+
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+static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
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+{
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+ struct ssb_chipcommon *chipco = &bus->chipco;
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+ struct gpio_chip *chip = &bus->gpio;
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+ int gpio;
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+
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+ if (bus->bustype != SSB_BUSTYPE_SSB)
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+ return;
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+
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+ chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
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+ free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_find_mapping(bus->irq_domain, gpio);
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+
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+ irq_dispose_mapping(irq);
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+ }
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+ irq_domain_remove(bus->irq_domain);
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+}
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+#else
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+static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
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+{
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+ return 0;
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+}
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+
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+static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
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+{
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}
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+#endif
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static int ssb_gpio_chipco_init(struct ssb_bus *bus)
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{
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struct gpio_chip *chip = &bus->gpio;
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+ int err;
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chip->label = "ssb_chipco_gpio";
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chip->owner = THIS_MODULE;
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@@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
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chip->set = ssb_gpio_chipco_set_value;
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chip->direction_input = ssb_gpio_chipco_direction_input;
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chip->direction_output = ssb_gpio_chipco_direction_output;
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- chip->to_irq = ssb_gpio_chipco_to_irq;
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+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
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+ chip->to_irq = ssb_gpio_to_irq;
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+#endif
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chip->ngpio = 16;
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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@@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
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else
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chip->base = -1;
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- return gpiochip_add(chip);
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+ err = ssb_gpio_irq_chipco_domain_init(bus);
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+ if (err)
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+ return err;
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+
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+ err = gpiochip_add(chip);
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+ if (err) {
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+ ssb_gpio_irq_chipco_domain_exit(bus);
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+ return err;
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+ }
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+
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+ return 0;
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}
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+/**************************************************
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+ * EXTIF
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+ **************************************************/
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+
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#ifdef CONFIG_SSB_DRIVER_EXTIF
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static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
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@@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
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return 0;
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}
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-static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
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+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
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+static void ssb_gpio_irq_extif_mask(struct irq_data *d)
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{
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- struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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+ struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
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+ int gpio = irqd_to_hwirq(d);
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- if (bus->bustype == SSB_BUSTYPE_SSB)
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- return ssb_mips_irq(bus->extif.dev) + 2;
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- else
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- return -EINVAL;
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+ ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
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+}
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+
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+static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
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+{
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+ struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
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+ int gpio = irqd_to_hwirq(d);
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+ u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
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+
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+ ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
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+ ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
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+}
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+
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+static struct irq_chip ssb_gpio_irq_extif_chip = {
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+ .name = "SSB-GPIO-EXTIF",
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+ .irq_mask = ssb_gpio_irq_extif_mask,
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+ .irq_unmask = ssb_gpio_irq_extif_unmask,
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+};
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+
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+static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
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+{
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+ struct ssb_bus *bus = dev_id;
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+ struct ssb_extif *extif = &bus->extif;
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+ u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
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+ u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
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+ u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
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+ unsigned long irqs = (val ^ pol) & mask;
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+ int gpio;
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+
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+ if (!irqs)
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+ return IRQ_NONE;
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+
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+ for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
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+ generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
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+ ssb_extif_gpio_polarity(extif, irqs, val & irqs);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
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+{
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+ struct ssb_extif *extif = &bus->extif;
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+ struct gpio_chip *chip = &bus->gpio;
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+ int gpio, hwirq, err;
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+
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+ if (bus->bustype != SSB_BUSTYPE_SSB)
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+ return 0;
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+
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+ bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
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+ &irq_domain_simple_ops, extif);
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+ if (!bus->irq_domain) {
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+ err = -ENODEV;
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+ goto err_irq_domain;
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+ }
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_create_mapping(bus->irq_domain, gpio);
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+
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+ irq_set_chip_data(irq, bus);
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+ irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
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+ handle_simple_irq);
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+ }
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+
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+ hwirq = ssb_mips_irq(bus->extif.dev) + 2;
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+ err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
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+ "gpio", bus);
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+ if (err)
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+ goto err_req_irq;
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+
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+ ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
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+
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+ return 0;
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+
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+err_req_irq:
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_find_mapping(bus->irq_domain, gpio);
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+
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+ irq_dispose_mapping(irq);
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+ }
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+ irq_domain_remove(bus->irq_domain);
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+err_irq_domain:
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+ return err;
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}
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+static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
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+{
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+ struct ssb_extif *extif = &bus->extif;
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+ struct gpio_chip *chip = &bus->gpio;
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+ int gpio;
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+
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+ if (bus->bustype != SSB_BUSTYPE_SSB)
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+ return;
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+
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+ free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
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+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
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+ int irq = irq_find_mapping(bus->irq_domain, gpio);
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+
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+ irq_dispose_mapping(irq);
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+ }
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+ irq_domain_remove(bus->irq_domain);
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+}
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+#else
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+static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
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+{
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+ return 0;
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+}
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+
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+static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
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+{
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+}
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+#endif
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+
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static int ssb_gpio_extif_init(struct ssb_bus *bus)
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{
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struct gpio_chip *chip = &bus->gpio;
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+ int err;
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chip->label = "ssb_extif_gpio";
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chip->owner = THIS_MODULE;
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@@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
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chip->set = ssb_gpio_extif_set_value;
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chip->direction_input = ssb_gpio_extif_direction_input;
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chip->direction_output = ssb_gpio_extif_direction_output;
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- chip->to_irq = ssb_gpio_extif_to_irq;
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+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
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+ chip->to_irq = ssb_gpio_to_irq;
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+#endif
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chip->ngpio = 5;
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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@@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
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else
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chip->base = -1;
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- return gpiochip_add(chip);
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+ err = ssb_gpio_irq_extif_domain_init(bus);
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+ if (err)
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+ return err;
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+
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+ err = gpiochip_add(chip);
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+ if (err) {
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+ ssb_gpio_irq_extif_domain_exit(bus);
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+ return err;
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+ }
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+
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+ return 0;
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}
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#else
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@@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
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}
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#endif
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+/**************************************************
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+ * Init
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+ **************************************************/
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+
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int ssb_gpio_init(struct ssb_bus *bus)
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{
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if (ssb_chipco_available(&bus->chipco))
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -374,7 +374,8 @@ static ssize_t \
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attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
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{ \
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return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
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-}
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+} \
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+static DEVICE_ATTR_RO(attrib);
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ssb_config_attr(core_num, core_index, "%u\n")
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ssb_config_attr(coreid, id.coreid, "0x%04x\n")
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@@ -387,16 +388,18 @@ name_show(struct device *dev, struct dev
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return sprintf(buf, "%s\n",
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ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
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}
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+static DEVICE_ATTR_RO(name);
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-static struct device_attribute ssb_device_attrs[] = {
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- __ATTR_RO(name),
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- __ATTR_RO(core_num),
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- __ATTR_RO(coreid),
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- __ATTR_RO(vendor),
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- __ATTR_RO(revision),
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- __ATTR_RO(irq),
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- __ATTR_NULL,
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+static struct attribute *ssb_device_attrs[] = {
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+ &dev_attr_name.attr,
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+ &dev_attr_core_num.attr,
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+ &dev_attr_coreid.attr,
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+ &dev_attr_vendor.attr,
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+ &dev_attr_revision.attr,
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+ &dev_attr_irq.attr,
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+ NULL,
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};
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+ATTRIBUTE_GROUPS(ssb_device);
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static struct bus_type ssb_bustype = {
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.name = "ssb",
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@@ -407,7 +410,7 @@ static struct bus_type ssb_bustype = {
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.suspend = ssb_device_suspend,
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.resume = ssb_device_resume,
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.uevent = ssb_device_uevent,
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- .dev_attrs = ssb_device_attrs,
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+ .dev_groups = ssb_device_groups,
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};
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static void ssb_buses_lock(void)
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@@ -590,6 +593,13 @@ static int ssb_attach_queued_buses(void)
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ssb_pcicore_init(&bus->pcicore);
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if (bus->bustype == SSB_BUSTYPE_SSB)
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ssb_watchdog_register(bus);
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+
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+ err = ssb_gpio_init(bus);
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+ if (err == -ENOTSUPP)
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+ ssb_dbg("GPIO driver not activated\n");
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+ else if (err)
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+ ssb_dbg("Error registering GPIO driver: %i\n", err);
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+
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ssb_bus_may_powerdown(bus);
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err = ssb_devices_register(bus);
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@@ -827,11 +837,6 @@ static int ssb_bus_register(struct ssb_b
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ssb_chipcommon_init(&bus->chipco);
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ssb_extif_init(&bus->extif);
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ssb_mipscore_init(&bus->mipscore);
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- err = ssb_gpio_init(bus);
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- if (err == -ENOTSUPP)
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- ssb_dbg("GPIO driver not activated\n");
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- else if (err)
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- ssb_dbg("Error registering GPIO driver: %i\n", err);
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err = ssb_fetch_invariants(bus, get_invariants);
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if (err) {
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ssb_bus_may_powerdown(bus);
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--- a/include/linux/ssb/ssb.h
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+++ b/include/linux/ssb/ssb.h
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@@ -33,6 +33,7 @@ struct ssb_sprom {
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u8 et1phyaddr; /* MII address for enet1 */
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u8 et0mdcport; /* MDIO for enet0 */
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u8 et1mdcport; /* MDIO for enet1 */
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+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
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u16 board_rev; /* Board revision number from SPROM. */
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u16 board_num; /* Board number from SPROM. */
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u16 board_type; /* Board type from SPROM. */
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@@ -486,6 +487,7 @@ struct ssb_bus {
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#endif /* EMBEDDED */
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#ifdef CONFIG_SSB_DRIVER_GPIO
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struct gpio_chip gpio;
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+ struct irq_domain *irq_domain;
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#endif /* DRIVER_GPIO */
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/* Internal-only stuff follows. Do not touch. */
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--- a/include/linux/ssb/ssb_driver_gige.h
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+++ b/include/linux/ssb/ssb_driver_gige.h
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@@ -108,6 +108,16 @@ static inline int ssb_gige_get_macaddr(s
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return 0;
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}
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+/* Get the device phy address */
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+static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
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+{
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+ struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
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+ if (!dev)
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+ return -ENODEV;
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+
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+ return dev->dev->bus->sprom.et0phyaddr;
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+}
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+
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extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
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struct pci_dev *pdev);
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extern int ssb_gige_map_irq(struct ssb_device *sdev,
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@@ -174,6 +184,10 @@ static inline int ssb_gige_get_macaddr(s
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{
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return -ENODEV;
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}
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+static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
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+{
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+ return -ENODEV;
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+}
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#endif /* CONFIG_SSB_DRIVER_GIGE */
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#endif /* LINUX_SSB_DRIVER_GIGE_H_ */
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--- a/arch/mips/bcm47xx/sprom.c
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+++ b/arch/mips/bcm47xx/sprom.c
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@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
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static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
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const char *prefix, bool fallback)
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{
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+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
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nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
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nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
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nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
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