mirror of https://github.com/hak5/openwrt-owl.git
239 lines
4.5 KiB
Plaintext
239 lines
4.5 KiB
Plaintext
/include/ "vr9.dtsi"
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/ {
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model = "ARV7519 - Astoria Networks ARV7519RW22-A-LT";
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chosen {
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bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
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};
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memory@0 {
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reg = <0x0 0x8000000>;
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};
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fpi@10000000 {
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localbus@0 {
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nor-boot@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x2000000>, <1 0x2000000 0x2000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x60000>;
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read-only;
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};
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partition@60000 {
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label = "uboot_cfg";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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label = "firmware";
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reg = <0x80000 0x1f00000>;
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};
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partition@1f80000 {
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label = "boardconfig";
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reg = <0x1f80000 0x80000>;
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read-only;
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};
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};
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};
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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gphy-leds {
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lantiq,groups = "gphy0 led1", "gphy1 led1";
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lantiq,function = "gphy";
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lantiq,pull = <2>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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phy-rst {
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lantiq,pins = "io42";
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lantiq,pull = <0>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io21";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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};
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eth@E108000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-net";
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reg = < 0xE108000 0x3000 /* switch */
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0xE10B100 0x70 /* mdio */
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0xE10B1D8 0x30 /* mii */
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0xE10B308 0x30 /* pmac */
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>;
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interrupt-parent = <&icu0>;
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interrupts = <73 72>;
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mac-address = [ 00 11 22 33 44 55 ];
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "mii";
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phy-handle = <&phy13>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "mii";
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phy-handle = <&phy14>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "mii";
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phy-handle = <&phy11>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <3>;
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phy-mode = "mii";
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phy-handle = <&phy12>;
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};
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};
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wan: interface@1 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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mac-address = [ 00 11 22 33 44 56 ];
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lantiq,wan;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy12: ethernet-phy@12 {
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reg = <0x12>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy14: ethernet-phy@14 {
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reg = <0x14>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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ifxhcd@E101000 {
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status = "okay";
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gpios = <&gpio 32 0>;
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lantiq,portmask = <0x3>;
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};
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pcie@d900000 {
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status = "disabled";
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compatible = "lantiq,pcie-xway";
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};
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pci@E105400 {
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status = "disabled";
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compatible = "lantiq,pci-xway";
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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wps {
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label = "wps";
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gpios = <&gpio 20 1>;
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linux,code = <0x211>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 22 1>;
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linux,code = <0x198>;
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};
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rfkill {
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label = "rfkill";
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gpios = <&gpio 45 1>;
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linux,code = <0xf7>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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lan_green {
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label = "lan";
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gpios = <&gpio 2 1>;
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};
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message_red {
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label = "message_red";
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gpios = <&gpio 10 1>;
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};
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power_red {
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label = "power";
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gpios = <&gpio 14 1>;
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default-state = "on";
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};
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alarm_blue {
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label = "alarm";
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gpios = <&gpio 15 1>;
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};
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message_orange {
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label = "message_orange";
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gpios = <&gpio 19 1>;
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};
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message_green {
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label = "message_green";
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gpios = <&gpio 28 1>;
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};
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voice_green {
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label = "voice";
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gpios = <&gpio 29 1>;
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};
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};
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};
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