mirror of https://github.com/hak5/openwrt-owl.git
235 lines
6.6 KiB
Diff
235 lines
6.6 KiB
Diff
From d94e2bd60b27f2ff7d6e9ff7ee43848bb2090c06 Mon Sep 17 00:00:00 2001
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From: dero <de@ro>
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Date: Mon, 19 Nov 2012 12:46:06 +0100
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Subject: [PATCH 038/196] Lazy CRC quirk: Implemented retrying mechanisms for
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SD SSR and SCR, disabled missing_status and spurious CRC ACMD51 quirks by
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default (should be fixed by the retrying-mechanishm)
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---
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drivers/mmc/core/sd.c | 115 +++++++++++++++++++++++++++++++++------
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drivers/mmc/host/sdhci-bcm2708.c | 11 +++-
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2 files changed, 108 insertions(+), 18 deletions(-)
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diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
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index 9e645e1..1ee6cf3 100644
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--- a/drivers/mmc/core/sd.c
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+++ b/drivers/mmc/core/sd.c
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@@ -13,6 +13,8 @@
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/stat.h>
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+#include <linux/jiffies.h>
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+#include <linux/nmi.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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@@ -58,6 +60,15 @@ static const unsigned int tacc_mant[] = {
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__res & __mask; \
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})
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+// timeout for tries
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+static const unsigned long retry_timeout_ms= 10*1000;
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+
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+// try at least 10 times, even if timeout is reached
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+static const int retry_min_tries= 10;
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+
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+// delay between tries
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+static const unsigned long retry_delay_ms= 10;
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+
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/*
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* Given the decoded CSD structure, decode the raw CID to our CID structure.
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*/
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@@ -210,12 +221,62 @@ static int mmc_decode_scr(struct mmc_card *card)
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}
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/*
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- * Fetch and process SD Status register.
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+ * Fetch and process SD Configuration Register.
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+ */
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+static int mmc_read_scr(struct mmc_card *card)
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+{
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+ unsigned long timeout_at;
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+ int err, tries;
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+
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+ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms );
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+ tries= 0;
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+
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+ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) )
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+ {
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+ unsigned long delay_at;
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+ tries++;
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+
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+ err = mmc_app_send_scr(card, card->raw_scr);
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+ if( !err )
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+ break; // sucess!!!
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+
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+ touch_nmi_watchdog(); // we are still alive!
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+
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+ // delay
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+ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms );
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+ while( time_before( jiffies, delay_at ) )
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+ {
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+ mdelay( 1 );
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+ touch_nmi_watchdog(); // we are still alive!
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+ }
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+ }
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+
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+ if( err)
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+ {
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+ pr_err("%s: failed to read SD Configuration register (SCR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err );
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+ return err;
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+ }
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+
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+ if( tries > 1 )
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+ {
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+ pr_info("%s: could read SD Configuration register (SCR) at the %dth attempt\n", mmc_hostname(card->host), tries );
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+ }
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+
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+ err = mmc_decode_scr(card);
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+ if (err)
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+ return err;
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+
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+ return err;
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+}
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+
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+/*
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+ * Fetch and process SD Status Register.
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*/
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static int mmc_read_ssr(struct mmc_card *card)
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{
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+ unsigned long timeout_at;
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unsigned int au, es, et, eo;
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- int err, i;
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+ int err, i, tries;
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u32 *ssr;
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if (!(card->csd.cmdclass & CCC_APP_SPEC)) {
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@@ -227,15 +288,41 @@ static int mmc_read_ssr(struct mmc_card *card)
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ssr = kmalloc(64, GFP_KERNEL);
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if (!ssr)
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return -ENOMEM;
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-
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- err = mmc_app_sd_status(card, ssr);
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- if (err) {
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- pr_warning("%s: problem reading SD Status "
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- "register.\n", mmc_hostname(card->host));
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- err = 0;
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+
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+ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms );
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+ tries= 0;
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+
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+ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) )
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+ {
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+ unsigned long delay_at;
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+ tries++;
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+
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+ err= mmc_app_sd_status(card, ssr);
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+ if( !err )
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+ break; // sucess!!!
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+
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+ touch_nmi_watchdog(); // we are still alive!
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+
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+ // delay
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+ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms );
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+ while( time_before( jiffies, delay_at ) )
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+ {
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+ mdelay( 1 );
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+ touch_nmi_watchdog(); // we are still alive!
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+ }
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+ }
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+
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+ if( err)
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+ {
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+ pr_err("%s: failed to read SD Status register (SSR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err );
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goto out;
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}
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+ if( tries > 1 )
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+ {
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+ pr_info("%s: could read SD Status register (SSR) at the %dth attempt\n", mmc_hostname(card->host), tries );
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+ }
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+
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for (i = 0; i < 16; i++)
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ssr[i] = be32_to_cpu(ssr[i]);
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@@ -808,15 +895,11 @@ int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card,
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if (!reinit) {
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/*
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- * Fetch SCR from card.
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+ * Fetch and decode SD Configuration register.
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*/
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- err = mmc_app_send_scr(card, card->raw_scr);
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- if (err)
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- return err;
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-
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- err = mmc_decode_scr(card);
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- if (err)
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- return err;
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+ err = mmc_read_scr(card);
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+ if( err )
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+ return err;
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/*
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* Fetch and process SD Status register.
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diff --git a/drivers/mmc/host/sdhci-bcm2708.c b/drivers/mmc/host/sdhci-bcm2708.c
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index ffd7310..3556ed3 100644
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--- a/drivers/mmc/host/sdhci-bcm2708.c
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+++ b/drivers/mmc/host/sdhci-bcm2708.c
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@@ -137,6 +137,7 @@ static bool allow_highspeed = 1;
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static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ;
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static bool sync_after_dma = 1;
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static bool missing_status = 1;
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+static bool spurious_crc_acmd51 = 0;
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bool enable_llm = 1;
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#if 0
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@@ -1103,7 +1104,7 @@ static unsigned int sdhci_bcm2708_quirk_extra_ints(struct sdhci_host *host)
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return 1;
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}
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-static unsigned int sdhci_bcm2708_quirk_spurious_crc(struct sdhci_host *host)
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+static unsigned int sdhci_bcm2708_quirk_spurious_crc_acmd51(struct sdhci_host *host)
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{
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return 1;
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}
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@@ -1149,7 +1150,6 @@ static struct sdhci_ops sdhci_bcm2708_ops = {
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.pdma_reset = sdhci_bcm2708_platdma_reset,
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#endif
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.extra_ints = sdhci_bcm2708_quirk_extra_ints,
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- .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc,
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.voltage_broken = sdhci_bcm2708_quirk_voltage_broken,
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.uhs_broken = sdhci_bcm2708_uhs_broken,
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};
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@@ -1194,6 +1194,11 @@ static int sdhci_bcm2708_probe(struct platform_device *pdev)
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sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status;
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}
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+ if( spurious_crc_acmd51 ) {
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+ sdhci_bcm2708_ops.spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc_acmd51;
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+ }
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+
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+
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printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable");
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host->hw_name = "BCM2708_Arasan";
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@@ -1389,6 +1394,7 @@ module_param(allow_highspeed, bool, 0444);
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module_param(emmc_clock_freq, int, 0444);
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module_param(sync_after_dma, bool, 0444);
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module_param(missing_status, bool, 0444);
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+module_param(spurious_crc_acmd51, bool, 0444);
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module_param(enable_llm, bool, 0444);
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module_param(cycle_delay, int, 0444);
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@@ -1401,6 +1407,7 @@ MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes");
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MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock");
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MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete");
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MODULE_PARM_DESC(missing_status, "Use the missing status quirk");
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+MODULE_PARM_DESC(spurious_crc_acmd51, "Use the spurious crc quirk for reading SCR (ACMD51)");
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MODULE_PARM_DESC(enable_llm, "Enable low-latency mode");
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--
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1.9.1
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