Florian Fainelli b89c81929e fix SPI message control handling for BCM6338/6348 ... BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. SVN-Revision: 32409		2012-06-17 16:17:29 +00:00
..
base-files	add 96348w3 board (#10764)	2012-06-06 15:45:04 +00:00
files/arch/mips/include/asm/mach-bcm63xx	bcm63xx: Move the OpenWrt rootfs length field	2011-04-15 12:18:25 +00:00
image	bcm63xx: build images for 6328 reference boards with various flash sizes	2012-05-30 10:27:46 +00:00
patches-3.3	fix SPI message control handling for BCM6338/6348	2012-06-17 16:17:29 +00:00
profiles	bcm63xx: add ath9k to atheros wifi profile	2012-05-27 13:22:48 +00:00
Makefile	bump to 3.3.8	2012-06-05 06:57:51 +00:00
base-files.mk	bcm63xx: Add defconfigs.	2010-11-28 22:04:19 +00:00
config-3.3	bcm63xx: enable bcm6328 support and required drivers	2012-05-27 13:22:46 +00:00
modules.mk	bcm63xx: drop linux 3.2 support	2012-04-24 11:49:27 +00:00