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openwrt-owl/target/linux/generic/files/drivers/net/phy/b53
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Jonas Gorski d75cd5be37 b53: fix mmap register read/writes > 32 bit 
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.

E.g. 48 bit values (with 5 being the most significant byte) aligned

0x00 ..01  or   0123
0x04 2345       45..

will become

0x00 ..10 resp. 3210
0x04 5432       54..

Likewise for 64 bit values.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 44568
 		2015-02-27 17:40:17 +00:00
..
Kconfig kernel: b53: add Register Access Bridge Registers (SRAB) interface 2013-09-25 21:44:28 +00:00
Makefile kernel: b53: add Register Access Bridge Registers (SRAB) interface 2013-09-25 21:44:28 +00:00
b53_common.c b53: Make b53_switch_init static 2014-02-22 11:16:58 +00:00
b53_mdio.c b53: Add BCM53128 switch support 2014-02-22 11:16:56 +00:00
b53_mmap.c b53: fix mmap register read/writes > 32 bit 2015-02-27 17:40:17 +00:00
b53_phy_fixup.c kernel: b53: support phy ids for BCM5365 2013-09-05 20:30:34 +00:00
b53_priv.h b53: hardcode reset GPIO for Linksys WRT300N 1.1 2014-07-06 11:40:51 +00:00
b53_regs.h kernel: b53: fix untagged shift for BCM5365 2013-11-13 18:04:39 +00:00
b53_spi.c b53: use drvdata to store driver data 2014-01-20 20:01:22 +00:00
b53_srab.c b53: use drvdata to store driver data 2014-01-20 20:01:22 +00:00