mirror of https://github.com/hak5/openwrt-owl.git
82 lines
2.4 KiB
Diff
82 lines
2.4 KiB
Diff
From 0f34b495557223c0d129bf97a1fb89990cfd83ed Mon Sep 17 00:00:00 2001
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From: Georgii Staroselskii <gosha371@gmail.com>
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Date: Tue, 23 Aug 2016 17:40:05 +0400
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Subject: [PATCH] overlays: added sc16is750 UART over I2C (#1617)
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 10 ++++++
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.../boot/dts/overlays/sc16is750-i2c-overlay.dts | 37 ++++++++++++++++++++++
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3 files changed, 48 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -75,6 +75,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
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dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
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dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
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dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
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+dtbo-$(RPI_DT_OVERLAYS) += sc16is750-i2c.dtbo
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dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
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dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
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dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -935,6 +935,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
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Params: <None>
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+Name: sc16is750-i2c
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+Info: Overlay for the NXP SC16IS750 UART with I2C Interface
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+ Enables the chip on I2C1 at 0x48. To select another address,
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+ please refer to table 10 in reference manual.
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+
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+Load: dtoverlay=sc16is750-i2c,<param>=<val>
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+Params: int_pin GPIO used for IRQ (default 24)
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+ addr Address (default 0x48)
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+
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+
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Name: sc16is752-spi1
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Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
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Enables the chip on SPI1.
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
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@@ -0,0 +1,37 @@
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
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+
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+ fragment@0 {
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+ target = <&i2c_arm>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ sc16is750: sc16is750@48 {
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+ compatible = "nxp,sc16is750";
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+ reg = <0x48>; /* address */
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+ clocks = <&sc16is750_clk>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
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+ #gpio-cells = <2>;
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+
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+ sc16is750_clk: sc16is750_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <14745600>;
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+ };
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+ };
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+ };
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+ };
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+
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+
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+ __overrides__ {
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+ int_pin = <&sc16is750>,"interrupts:0";
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+ addr = <&sc16is750>,"reg:0";
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+ };
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+
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+};
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