mirror of https://github.com/hak5/openwrt-owl.git
88 lines
3.4 KiB
Diff
88 lines
3.4 KiB
Diff
From 764cf7045e6338c1ca850ef1fce522b31440dab9 Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Wed, 16 Mar 2016 12:25:02 -0700
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Subject: [PATCH] dmaengine: bcm2835: add dma_memcopy support to bcm2835-dma
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Also added check for an error condition in bcm2835_dma_create_cb_chain
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that showed up during development of this patch.
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Tested using dmatest for all enabled channels.
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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---
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drivers/dma/bcm2835-dma.c | 36 +++++++++++++++++++++++++++++++++++-
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1 file changed, 35 insertions(+), 1 deletion(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -310,6 +310,9 @@ static struct bcm2835_desc *bcm2835_dma_
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struct bcm2835_cb_entry *cb_entry;
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struct bcm2835_dma_cb *control_block;
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+ if (!frames)
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+ return NULL;
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+
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/* allocate and setup the descriptor. */
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d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
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gfp);
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@@ -597,6 +600,34 @@ static void bcm2835_dma_issue_pending(st
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spin_unlock_irqrestore(&c->vc.lock, flags);
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}
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+struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy(
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+ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
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+ size_t len, unsigned long flags)
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+{
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+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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+ struct bcm2835_desc *d;
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+ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
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+ u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP;
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+ size_t max_len = bcm2835_dma_max_frame_length(c);
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+ size_t frames;
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+
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+ /* if src, dst or len is not given return with an error */
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+ if (!src || !dst || !len)
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+ return NULL;
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+
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+ /* calculate number of frames */
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+ frames = bcm2835_dma_frames_for_length(len, max_len);
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+
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+ /* allocate the CB chain - this also fills in the pointers */
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+ d = bcm2835_dma_create_cb_chain(chan, DMA_MEM_TO_MEM, false,
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+ info, extra, frames,
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+ src, dst, len, 0, GFP_KERNEL);
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+ if (!d)
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+ return NULL;
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+
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+ return vchan_tx_prep(&c->vc, &d->vd, flags);
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+}
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+
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static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
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struct dma_chan *chan,
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struct scatterlist *sgl, unsigned int sg_len,
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@@ -880,17 +911,20 @@ static int bcm2835_dma_probe(struct plat
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dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
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dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
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dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
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+ dma_cap_set(DMA_MEMCPY, od->ddev.cap_mask);
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od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
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od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
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od->ddev.device_tx_status = bcm2835_dma_tx_status;
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od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
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od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
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od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
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+ od->ddev.device_prep_dma_memcpy = bcm2835_dma_prep_dma_memcpy;
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od->ddev.device_config = bcm2835_dma_slave_config;
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od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
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od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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od->ddev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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- od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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+ od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
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+ BIT(DMA_MEM_TO_MEM);
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od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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od->ddev.dev = &pdev->dev;
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INIT_LIST_HEAD(&od->ddev.channels);
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