mirror of https://github.com/hak5/openwrt-owl.git
311 lines
7.8 KiB
Diff
311 lines
7.8 KiB
Diff
From 3466449c8f455da0cb646231602e6af16190f592 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 5 May 2011 23:00:23 +0200
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Subject: [PATCH 13/13] MIPS: Lantiq: Add watchdog support
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This patch adds the driver for the watchdog found inside the Lantiq SoC family.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com>
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Cc: Wim Van Sebroeck <wim@iguana.be>
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Cc: linux-mips@linux-mips.org
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Cc: linux-watchdog@vger.kernel.org
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Patchwork: https://patchwork.linux-mips.org/patch/2327/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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drivers/watchdog/Kconfig | 6 +
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drivers/watchdog/Makefile | 1 +
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drivers/watchdog/lantiq_wdt.c | 261 +++++++++++++++++++++++++++++++++++++++++
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3 files changed, 268 insertions(+), 0 deletions(-)
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create mode 100644 drivers/watchdog/lantiq_wdt.c
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--- a/drivers/watchdog/Kconfig
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+++ b/drivers/watchdog/Kconfig
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@@ -850,6 +850,12 @@
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help
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Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
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+config LANTIQ_WDT
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+ tristate "Lantiq SoC watchdog"
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+ depends on LANTIQ
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+ help
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+ Hardware driver for the Lantiq SoC Watchdog Timer.
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+
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# PARISC Architecture
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# POWERPC Architecture
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--- a/drivers/watchdog/Makefile
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+++ b/drivers/watchdog/Makefile
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@@ -113,6 +113,7 @@
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obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
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obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
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obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
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+obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
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# PARISC Architecture
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--- /dev/null
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+++ b/drivers/watchdog/lantiq_wdt.c
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@@ -0,0 +1,261 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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+ * Based on EP93xx wdt driver
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/fs.h>
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+#include <linux/miscdevice.h>
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+#include <linux/watchdog.h>
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+#include <linux/platform_device.h>
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+#include <linux/uaccess.h>
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+#include <linux/clk.h>
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+#include <linux/io.h>
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+
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+#include <lantiq.h>
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+
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+/* Section 3.4 of the datasheet
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+ * The password sequence protects the WDT control register from unintended
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+ * write actions, which might cause malfunction of the WDT.
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+ *
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+ * essentially the following two magic passwords need to be written to allow
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+ * IO access to the WDT core
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+ */
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+#define LTQ_WDT_PW1 0x00BE0000
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+#define LTQ_WDT_PW2 0x00DC0000
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+
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+#define LTQ_WDT_CR 0x0 /* watchdog control register */
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+#define LTQ_WDT_SR 0x8 /* watchdog status register */
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+
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+#define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
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+#define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
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+#define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
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+ /* divider to 0x40000 */
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+#define LTQ_WDT_DIVIDER 0x40000
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+#define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
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+
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+static int nowayout = WATCHDOG_NOWAYOUT;
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+
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+static void __iomem *ltq_wdt_membase;
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+static unsigned long ltq_io_region_clk_rate;
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+
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+static unsigned long ltq_wdt_bootstatus;
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+static unsigned long ltq_wdt_in_use;
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+static int ltq_wdt_timeout = 30;
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+static int ltq_wdt_ok_to_close;
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+
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+static void
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+ltq_wdt_enable(void)
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+{
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+ ltq_wdt_timeout = ltq_wdt_timeout *
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+ (ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
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+ if (ltq_wdt_timeout > LTQ_MAX_TIMEOUT)
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+ ltq_wdt_timeout = LTQ_MAX_TIMEOUT;
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+
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+ /* write the first password magic */
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+ ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
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+ /* write the second magic plus the configuration and new timeout */
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+ ltq_w32(LTQ_WDT_SR_EN | LTQ_WDT_SR_PWD | LTQ_WDT_SR_CLKDIV |
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+ LTQ_WDT_PW2 | ltq_wdt_timeout, ltq_wdt_membase + LTQ_WDT_CR);
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+}
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+
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+static void
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+ltq_wdt_disable(void)
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+{
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+ /* write the first password magic */
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+ ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
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+ /* write the second password magic with no config
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+ * this turns the watchdog off
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+ */
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+ ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
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+}
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+
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+static ssize_t
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+ltq_wdt_write(struct file *file, const char __user *data,
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+ size_t len, loff_t *ppos)
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+{
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+ if (len) {
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+ if (!nowayout) {
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+ size_t i;
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+
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+ ltq_wdt_ok_to_close = 0;
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+ for (i = 0; i != len; i++) {
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+ char c;
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+
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+ if (get_user(c, data + i))
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+ return -EFAULT;
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+ if (c == 'V')
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+ ltq_wdt_ok_to_close = 1;
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+ else
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+ ltq_wdt_ok_to_close = 0;
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+ }
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+ }
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+ ltq_wdt_enable();
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+ }
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+
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+ return len;
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+}
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+
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+static struct watchdog_info ident = {
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+ .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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+ WDIOF_CARDRESET,
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+ .identity = "ltq_wdt",
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+};
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+
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+static long
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+ltq_wdt_ioctl(struct file *file,
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+ unsigned int cmd, unsigned long arg)
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+{
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+ int ret = -ENOTTY;
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+
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+ switch (cmd) {
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+ case WDIOC_GETSUPPORT:
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+ ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
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+ sizeof(ident)) ? -EFAULT : 0;
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+ break;
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+
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+ case WDIOC_GETBOOTSTATUS:
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+ ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
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+ break;
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+
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+ case WDIOC_GETSTATUS:
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+ ret = put_user(0, (int __user *)arg);
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+ break;
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+
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+ case WDIOC_SETTIMEOUT:
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+ ret = get_user(ltq_wdt_timeout, (int __user *)arg);
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+ if (!ret)
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+ ltq_wdt_enable();
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+ /* intentional drop through */
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+ case WDIOC_GETTIMEOUT:
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+ ret = put_user(ltq_wdt_timeout, (int __user *)arg);
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+ break;
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+
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+ case WDIOC_KEEPALIVE:
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+ ltq_wdt_enable();
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+ ret = 0;
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+ break;
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+ }
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+ return ret;
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+}
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+
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+static int
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+ltq_wdt_open(struct inode *inode, struct file *file)
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+{
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+ if (test_and_set_bit(0, <q_wdt_in_use))
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+ return -EBUSY;
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+ ltq_wdt_in_use = 1;
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+ ltq_wdt_enable();
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+
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+ return nonseekable_open(inode, file);
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+}
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+
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+static int
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+ltq_wdt_release(struct inode *inode, struct file *file)
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+{
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+ if (ltq_wdt_ok_to_close)
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+ ltq_wdt_disable();
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+ else
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+ pr_err("ltq_wdt: watchdog closed without warning\n");
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+ ltq_wdt_ok_to_close = 0;
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+ clear_bit(0, <q_wdt_in_use);
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+
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+ return 0;
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+}
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+
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+static const struct file_operations ltq_wdt_fops = {
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+ .owner = THIS_MODULE,
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+ .write = ltq_wdt_write,
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+ .unlocked_ioctl = ltq_wdt_ioctl,
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+ .open = ltq_wdt_open,
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+ .release = ltq_wdt_release,
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+ .llseek = no_llseek,
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+};
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+
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+static struct miscdevice ltq_wdt_miscdev = {
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+ .minor = WATCHDOG_MINOR,
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+ .name = "watchdog",
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+ .fops = <q_wdt_fops,
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+};
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+
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+static int __init
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+ltq_wdt_probe(struct platform_device *pdev)
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+{
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+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ struct clk *clk;
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+
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+ if (!res) {
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+ dev_err(&pdev->dev, "cannot obtain I/O memory region");
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+ return -ENOENT;
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+ }
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+ res = devm_request_mem_region(&pdev->dev, res->start,
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+ resource_size(res), dev_name(&pdev->dev));
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+ if (!res) {
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+ dev_err(&pdev->dev, "cannot request I/O memory region");
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+ return -EBUSY;
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+ }
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+ ltq_wdt_membase = devm_ioremap_nocache(&pdev->dev, res->start,
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+ resource_size(res));
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+ if (!ltq_wdt_membase) {
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+ dev_err(&pdev->dev, "cannot remap I/O memory region\n");
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+ return -ENOMEM;
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+ }
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+
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+ /* we do not need to enable the clock as it is always running */
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+ clk = clk_get(&pdev->dev, "io");
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+ WARN_ON(!clk);
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+ ltq_io_region_clk_rate = clk_get_rate(clk);
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+ clk_put(clk);
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+
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+ if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST)
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+ ltq_wdt_bootstatus = WDIOF_CARDRESET;
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+
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+ return misc_register(<q_wdt_miscdev);
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+}
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+
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+static int __devexit
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+ltq_wdt_remove(struct platform_device *pdev)
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+{
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+ misc_deregister(<q_wdt_miscdev);
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+
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+ if (ltq_wdt_membase)
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+ iounmap(ltq_wdt_membase);
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+
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+ return 0;
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+}
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+
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+
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+static struct platform_driver ltq_wdt_driver = {
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+ .remove = __devexit_p(ltq_wdt_remove),
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+ .driver = {
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+ .name = "ltq_wdt",
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+ .owner = THIS_MODULE,
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+ },
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+};
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+
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+static int __init
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+init_ltq_wdt(void)
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+{
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+ return platform_driver_probe(<q_wdt_driver, ltq_wdt_probe);
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+}
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+
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+static void __exit
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+exit_ltq_wdt(void)
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+{
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+ return platform_driver_unregister(<q_wdt_driver);
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+}
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+
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+module_init(init_ltq_wdt);
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+module_exit(exit_ltq_wdt);
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+
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+module_param(nowayout, int, 0);
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+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
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+
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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+MODULE_DESCRIPTION("Lantiq SoC Watchdog");
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+MODULE_LICENSE("GPL");
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+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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