mirror of https://github.com/hak5/openwrt-owl.git
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
/*
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* Ralink SoC common setup
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/serial_8250.h>
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#include <asm/bootinfo.h>
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#include <asm/addrspace.h>
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#include <asm/mips_machine.h>
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#include <asm/mach-ralink/common.h>
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#include <asm/mach-ralink/machine.h>
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#include <ralink_soc.h>
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unsigned char ramips_sys_type[RAMIPS_SYS_TYPE_LEN];
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enum ramips_mach_type ramips_mach = RAMIPS_MACH_GENERIC;
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const char *get_system_type(void)
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{
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return ramips_sys_type;
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}
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static void __init detect_mem_size(void)
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{
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unsigned long size;
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for (size = RALINK_SOC_MEM_SIZE_MIN; size < RALINK_SOC_MEM_SIZE_MAX;
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size <<= 1 ) {
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if (!memcmp(detect_mem_size,
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detect_mem_size + size, 1024))
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break;
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}
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add_memory_region(RALINK_SOC_SDRAM_BASE, size, BOOT_MEM_RAM);
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}
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void __init ramips_early_serial_setup(int line, unsigned base, unsigned freq,
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unsigned irq)
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{
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struct uart_port p;
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int err;
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memset(&p, 0, sizeof(p));
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p.flags = UPF_SKIP_TEST;
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p.iotype = UPIO_AU;
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p.uartclk = freq;
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p.regshift = 2;
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p.type = PORT_16550A;
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p.mapbase = base;
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p.membase = ioremap_nocache(p.mapbase, PAGE_SIZE);
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p.line = line;
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p.irq = irq;
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err = early_serial_setup(&p);
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if (err)
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printk(KERN_ERR "early serial%d registration failed %d\n",
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line, err);
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}
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void __init plat_mem_setup(void)
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{
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set_io_port_base(KSEG1);
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detect_mem_size();
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ramips_soc_setup();
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}
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static int __init ramips_machine_setup(void)
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{
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mips_machine_setup(ramips_mach);
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return 0;
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}
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arch_initcall(ramips_machine_setup);
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static void __init ramips_generic_init(void)
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{
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}
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MIPS_MACHINE(RAMIPS_MACH_GENERIC, "Generic Ralink board", ramips_generic_init);
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