mirror of https://github.com/hak5/openwrt-owl.git
64 lines
1.6 KiB
Diff
64 lines
1.6 KiB
Diff
From 59f0ce1a3ebb9288fc8c1400aa503e923621161e Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <f.fainelli@gmail.com>
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Date: Mon, 23 May 2016 16:38:00 -0700
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Subject: [PATCH 1/3] ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
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Add the Switch Register Access Block which is a special piece of
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hardware allowing us to perform indirect read/writes towards the
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integrated BCM5301X Ethernet switch.
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We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi
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bus node to get proper binding between the BCMA instantiated core and
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the Device Tree nodes. We will need that to be able to reference
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Ethernet Device Tree nodes in a future patch adding the switch ports
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layout.
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 27 +++++++++++++++++++++++++++
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1 file changed, 27 insertions(+)
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -239,6 +239,22 @@
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status = "disabled";
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};
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};
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+
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+ gmac0: ethernet@24000 {
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+ reg = <0x24000 0x800>;
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+ };
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+
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+ gmac1: ethernet@25000 {
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+ reg = <0x25000 0x800>;
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+ };
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+
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+ gmac2: ethernet@26000 {
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+ reg = <0x26000 0x800>;
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+ };
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+
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+ gmac3: ethernet@27000 {
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+ reg = <0x27000 0x800>;
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+ };
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};
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lcpll0: lcpll0@1800c100 {
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@@ -260,6 +276,17 @@
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"sata2";
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};
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+ srab: srab@18007000 {
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+ compatible = "brcm,bcm5301x-srab";
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+ reg = <0x18007000 0x1000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "disabled";
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+
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+ /* ports are defined in board DTS */
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+ };
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+
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nand: nand@18028000 {
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compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
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reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
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