mirror of https://github.com/hak5/openwrt-owl.git
44 lines
1.5 KiB
Diff
44 lines
1.5 KiB
Diff
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
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Date: Wed, 23 Mar 2016 00:44:40 +0300
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Subject: [PATCH] at803x: fix reset handling
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The driver of course "knows" that the chip's reset signal is active low,
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so it drives the GPIO to 0 to reset the PHY and to 1 otherwise; however
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all this will only work iff the GPIO is specified as active-high in the
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device tree! I think both the driver and the device trees (if there are
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any -- I was unable to find them) need to be fixed in this case...
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Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset")
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Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
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Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -250,7 +250,7 @@ static int at803x_probe(struct phy_devic
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if (!priv)
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return -ENOMEM;
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- gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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+ gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(gpiod_reset))
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return PTR_ERR(gpiod_reset);
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@@ -377,10 +377,10 @@ static void at803x_link_change_notify(st
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at803x_context_save(phydev, &context);
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- gpiod_set_value(priv->gpiod_reset, 0);
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- msleep(1);
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gpiod_set_value(priv->gpiod_reset, 1);
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msleep(1);
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+ gpiod_set_value(priv->gpiod_reset, 0);
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+ msleep(1);
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at803x_context_restore(phydev, &context);
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