mirror of https://github.com/hak5/openwrt-owl.git
227 lines
6.0 KiB
C
227 lines
6.0 KiB
C
/*
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* WD My Net N750 board support
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*
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* Copyright (C) 2013 Felix Kaechele <felix@fetzig.org>
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* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "nvram.h"
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/*
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* Taken from GPL bootloader source:
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* board/ar7240/db12x/alpha_gpio.c
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*/
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#define MYNET_N750_GPIO_LED_WIFI 11
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#define MYNET_N750_GPIO_LED_INTERNET 12
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#define MYNET_N750_GPIO_LED_WPS 13
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#define MYNET_N750_GPIO_LED_POWER 14
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#define MYNET_N750_GPIO_BTN_RESET 17
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#define MYNET_N750_GPIO_BTN_WPS 19
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#define MYNET_N750_GPIO_EXTERNAL_LNA0 15
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#define MYNET_N750_GPIO_EXTERNAL_LNA1 18
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#define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */
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#define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL)
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#define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000
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#define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000
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#define MYNET_N750_NVRAM_ADDR 0x1f058010
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#define MYNET_N750_NVRAM_SIZE 0x7ff0
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static struct gpio_led mynet_n750_leds_gpio[] __initdata = {
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{
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.name = "wd:blue:power",
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.gpio = MYNET_N750_GPIO_LED_POWER,
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.active_low = 0,
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},
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{
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.name = "wd:blue:wps",
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.gpio = MYNET_N750_GPIO_LED_WPS,
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.active_low = 0,
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},
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{
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.name = "wd:blue:wireless",
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.gpio = MYNET_N750_GPIO_LED_WIFI,
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.active_low = 0,
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},
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{
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.name = "wd:blue:internet",
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.gpio = MYNET_N750_GPIO_LED_INTERNET,
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.active_low = 0,
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},
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};
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static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
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.gpio = MYNET_N750_GPIO_BTN_RESET,
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.active_low = 1,
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},
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
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.gpio = MYNET_N750_GPIO_BTN_WPS,
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.active_low = 1,
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},
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};
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static const struct ar8327_led_info mynet_n750_leds_ar8327[] __initconst = {
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AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"),
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AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"),
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AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"),
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AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"),
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AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"),
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AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"),
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AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"),
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AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"),
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AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"),
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AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"),
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};
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static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = {
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.led_ctrl0 = 0xcc35cc35,
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.led_ctrl1 = 0xca35ca35,
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.led_ctrl2 = 0xc935c935,
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.led_ctrl3 = 0x03ffff00,
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.open_drain = false,
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};
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static struct ar8327_platform_data mynet_n750_ar8327_data = {
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.pad0_cfg = &mynet_n750_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.led_cfg = &mynet_n750_ar8327_led_cfg,
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.num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327),
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.leds = mynet_n750_leds_ar8327,
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};
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static struct mdio_board_info mynet_n750_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &mynet_n750_ar8327_data,
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},
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};
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static void mynet_n750_get_mac(const char *name, char *mac)
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{
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u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR);
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int err;
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err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE,
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name, mac);
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if (err)
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pr_err("no MAC address found for %s\n", name);
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}
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/*
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* The bootloader on this board powers down all PHYs on the switch
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* before booting the kernel. We bring all PHYs back up so that they are
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* discoverable by the mdio bus scan and the switch is detected
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* correctly.
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*/
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static void mynet_n750_mdio_fixup(struct mii_bus *bus)
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{
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int i;
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for (i = 0; i < 5; i++)
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bus->write(bus, i, MII_BMCR,
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(BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000));
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mdelay(1000);
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}
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static void __init mynet_n750_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 tmpmac[ETH_ALEN];
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio),
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mynet_n750_leds_gpio);
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ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(mynet_n750_gpio_keys),
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mynet_n750_gpio_keys);
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/*
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* Control signal for external LNAs 0 and 1
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* Taken from GPL bootloader source:
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* board/ar7240/db12x/alpha_gpio.c
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*/
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ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0);
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ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1);
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mynet_n750_get_mac("wlan24mac=", tmpmac);
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ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac);
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mynet_n750_get_mac("wlan5mac=", tmpmac);
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ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
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mdiobus_register_board_info(mynet_n750_mdio0_info,
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ARRAY_SIZE(mynet_n750_mdio0_info));
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ath79_mdio0_data.reset = mynet_n750_mdio_fixup;
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ath79_register_mdio(0, 0x0);
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mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr);
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/* GMAC0 is connected to an AR8327N switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_register_eth(0);
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ath79_register_usb();
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}
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MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750",
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mynet_n750_setup);
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