Commit Graph

12 Commits (fb4196ec2af752f6660ee2e813844357c1150552)

Author SHA1 Message Date
John Crispin fb4196ec2a atheros: ar2315-pci: update DMA offset macroses
Remove duplicated macroses, which define DMA offset (SDRAM baseaddress).

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42504
2014-09-12 06:53:21 +00:00
John Crispin 94efeaa51f atheros: ar2315-pci: update host bridge resources
It seems that the PCI controller does not support I/O ports, so remove
the ports range. Also correct the beginning of the memory range and its
size.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42503
2014-09-12 06:53:15 +00:00
John Crispin 78c914ffe5 atheros: ar2315-pci: rework the configuration access code
Use __raw_{read,write}l accessors and use Abort interrupt to detect a
configuration space read/write errors. The second change improves errors
detection, what improves the device presence detection and helps us to
avoid following (and similar) errors:

pci 0000:00:00.2: ignoring class 0x7e0200 (doesn't match header type 02)
pci 0000:00:00.2: bridge configuration invalid ([bus 03-90]), reconfiguring
pci 0000:00:00.2: not setting up bridge for bus 0000:01

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42502
2014-09-12 06:53:09 +00:00
John Crispin dbdd8906ac atheros: ar2315-pci: rework interrupt handling
Add PCI IRQ controller to facilitate interrupt handling, move interrupts
initialization to the IRQ controller initialization from
pcibios_plat_dev_init() callback.

Also remove odd PCI dev configuration manipulation from pcibios_plat_dev_init()
callback.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42501
2014-09-12 06:53:00 +00:00
John Crispin 0f645cbd83 atheros: ar2315-pci: rework host controller initialization
Explicitly configure PCI host controller, and do not expose it to PCI
subsystem. The PCI host controller acts as a usual PCI device connected
to the bus, but its configuration as a usual PCI device is senseless,
since the host controller provide access to _internal_ memory space for
_external_ device.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42500
2014-09-12 06:52:55 +00:00
John Crispin 37d2445fcb atheros: ar2315-pci: cosmetic changes
- add comment, which briefly describes PCI controller features and
   Fonera 2.0g schematics.
 - rename several functions and structures, to make it clear that this
   code only for AR2315 chips.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42499
2014-09-12 06:52:51 +00:00
John Crispin 1e6af86ff9 atheros: ar2315-pci: remove odd locking in PCI config space access function
Caller (generic PCI code) already do proper locking so no need to add
another one here.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42498
2014-09-12 06:52:46 +00:00
John Crispin 09f38a3f76 atheros: remove odd ATHEROS_AR2315 config symbol dependencies
Remove options which already selected by ATHEROS_AR231X on which
ATHEROS_AR2315 depends.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42497
2014-09-12 06:52:42 +00:00
John Crispin 2e9deed90a atheros: various space related changes
- remove odd blank lines
 - remove odd spaces after casts
 - fix alignment

 No functional changes.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42496
2014-09-12 06:52:36 +00:00
John Crispin 9055970e92 atheros: remove FSF mailing address
Remove FSF mailing address as suggested by checkpach and place license
URL.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42487
2014-09-12 06:51:33 +00:00
John Crispin 5b4e53f59f atheros: use static keywork for local code
Make PCI IRQ handler and several structures static as suggested by
sparse.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 42485
2014-09-12 06:51:10 +00:00
Felix Fietkau 5b9d4fd80a atheros: copy 3.10 patches to 3.14 and refresh them
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 41995
2014-08-04 20:54:49 +00:00