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Commit Graph

Author	SHA1	Message	Date
Florian Fainelli	b89c81929e	fix SPI message control handling for BCM6338/6348 BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. SVN-Revision: 32409	2012-06-17 16:17:29 +00:00

Author

SHA1

Message

Date

Florian Fainelli

b89c81929e

fix SPI message control handling for BCM6338/6348

BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.

SVN-Revision: 32409

2012-06-17 16:17:29 +00:00

1 Commits (dcd339ac9d731999a0aae2d82eed138f03ce81e5)