Commit Graph

9 Commits (d354bfde174514973309e788e11c286f1667c2f5)

Author SHA1 Message Date
Felix Fietkau 49d4a980d7 ipq806x: fix pcie reset gpio definions and move them to the common .dtsi file
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 47544
2015-11-21 10:54:58 +00:00
Felix Fietkau 575413a779 ipq806x: fix pcie tx0-term-offset setting
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 47543
2015-11-21 10:54:53 +00:00
Felix Fietkau 44b8472f16 ipq806x: fix device tree nodes for PCI to get rid of I/O and memory offsets
Fixes QCA99x0 detection issues

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 47542
2015-11-21 10:54:48 +00:00
John Crispin b0b59a8e75 ipq806x: switch AP148 to using SMEM based MTD parser
*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in
 the kernel config
*Replaces the MTD layout in DT by the dynamic layout provided by the
 SMEM parser for AP148

Using the OF based parser is still possible on platforms which have a
fixed MTD partition layout.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46658
2015-08-17 06:18:15 +00:00
John Crispin 6b775f4517 ipq806x: add hwspinlock support
This change cherry-picks the following 3 changes from linux-next:
*fb7737 hwspinlock/core: add device tree support
*19a0f6 hwspinlock: qcom: Add support for Qualcomm HW Mutex block
*bd5717 hwspinlock: qcom: Correct msb in regmap_field

We're also adding a patch to add the hardware spinlock device nodes on
IPQ806x platforms (033-soc-qcom-Add-sfbp-device-to-IPQ806x-dts.patch).

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46655
2015-08-17 06:17:47 +00:00
Felix Fietkau 0f7de49fa3 ipq806x: fix freeze in PCIe code when booting with an old u-boot
Old bootloader (same ones which have DT disabled) don't perform any PCIe
initialization. The consequence is a freeze during PCIe bring-up on
these old u-boot. Same kernel with a newer bootloaders works fine as
they contain the corresponding PCIe init code.

In this change, we'll add the missing init and make sure the kernel
doesn't rely on some preexisting init to get PCIe to work. That includes
the following changes:
*GPIOs: set function & drive strength
*Clocks: add init code for aux & ref clocks
*PCIe driver: additional init of the hardware controller

Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46557
2015-08-04 23:10:03 +00:00
Felix Fietkau f7651fdba5 ipq806x: fix pcie pinmux naming in ipq806x dts
PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but
the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing
the pinmux numbering to match the controller's one.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46556
2015-08-04 23:09:55 +00:00
Felix Fietkau c4c986e419 ipq806x: add support for non-dt enabled ap148 bootloader
Certain AP148 platforms (and derivative) use bootloaders which did not
have DT enabled.
In order to support these old platforms, we'll now make the following
modifications:
*explicitely add the memory node in the AP148 DT: this used to be added
 by new u-boot through a run-time patch mechanism. We'll now add it
 explicitely so it works on boots which don't support that feature. New
 boots will have the node twice, the second one will be ignored.
*add the zImage generation next to the FIT image for AP148.

Other platforms using non-DT enabled bootloaders may want to leverage
this zImage code to generate their own firmare as well.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46555
2015-08-04 23:09:43 +00:00
Felix Fietkau 4d1656e813 ipq806x: update bleeding-edge kernel from 4.0 to 4.1
Default kernel doesn't change and stays on 3.18 for now.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46554
2015-08-04 23:09:38 +00:00