2c4e3cf33a
ar71xx: ag71xx: get max_frame_len and desc_pktlen_mask from platform data
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This will allow to use SoC specific values for both.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39145
2013-12-20 11:41:17 +00:00
ba860e4c3a
ar71xx: make ag71xx_mdio_platform_data visible
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This enables us to modify the ag71xx_mdio_platform_data from within the
board support files.
Signed-off-by: Felix Kaechele <heffer@fedoraproject.org>
Patchwork: http://patchwork.openwrt.org/patch/4613/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39126
2013-12-17 22:14:07 +00:00
e312a917d3
ar71xx: rename ath79_parse_mac_addr to ath79_parse_ascii_mac
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Rename the function and extend it in order to make it
usable from board setup code.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 38085
2013-09-20 16:41:30 +00:00
1d55249d7c
ar71xx: use backported QCA955x patches
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35878
2013-03-04 11:48:15 +00:00
8a9d92f125
ar71xx: fix ethernet device registration for the QCA9556 SoC
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Based on http://patchwork.openwrt.org/patch/3162/
Signed-off-by: Embedded Wireless GmbH <info at embeddedwireless.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35394
2013-01-29 19:12:28 +00:00
5dec87afef
ar71xx: fix ethernet device registration for QCA9558
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34853
2012-12-22 12:12:48 +00:00
4085a5773d
ar71xx: fixup allowed PHY interface types for QCA9558
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34851
2012-12-22 12:12:44 +00:00
f01a786825
ar71xx: don't assign any MII bus device on QCA9558 by default
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34850
2012-12-22 12:12:43 +00:00
5ffc08e3dc
ar71xx: add a helper function for setting up ETH_CFG register on AR934x
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 33817
2012-10-17 18:27:45 +00:00
170cd7a19a
ar71xx: avoid possible NULL pointer dereference in ath79_init_{,local}_mac
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SVN-Revision: 33575
2012-09-27 20:05:42 +00:00
94bac7366c
ar71xx: use dynamic clock dividers on the 2nd MDIO of AR934x
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SVN-Revision: 33343
2012-09-09 14:05:20 +00:00
11c3392b7f
Revert "ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240"
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That was based on assumptions.
SVN-Revision: 33310
2012-08-29 10:37:55 +00:00
cca873e8e0
ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240
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Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 33280
2012-08-27 14:55:26 +00:00
d1b237b335
ar71xx: add initial support for the QCA955X SoCs
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SVN-Revision: 32606
2012-07-05 08:26:47 +00:00
dc9675282e
ar71xx: add a helper function for setting up PHY4 swapping on ar933x
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SVN-Revision: 32092
2012-06-06 17:24:09 +00:00
8039a1bbb2
ar71xx: fix MII clock settings for various chips, improves ethernet stability on AR934x
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SVN-Revision: 31925
2012-05-27 21:02:41 +00:00
3e3a4d3d6b
ar71xx: allow to disable link polling on unused PHYs
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SVN-Revision: 31533
2012-04-29 18:29:24 +00:00
e9b45ebaba
ar71xx: add AR934x specific interface speed setup for ge0
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SVN-Revision: 31017
2012-03-19 11:11:20 +00:00
1c5ac02a29
ar71xx: reset the switch on AR934x before ethernet device registration
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SVN-Revision: 30922
2012-03-13 17:29:33 +00:00
66df117d1b
ar71xx: use a dummy callback for interfaces with fixed speed
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SVN-Revision: 30913
2012-03-12 20:38:58 +00:00
8b2b37ae58
ar71xx: merge ar934x_bo_ddr_flush patch
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SVN-Revision: 30912
2012-03-12 20:38:57 +00:00
d72bde99cd
ar71xx: merge files-3.2 to files
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SVN-Revision: 30405
2012-02-10 08:19:31 +00:00
Gabor Juhos
Felix Fietkau